Dell PowerEdge M910 Техническое руководство - Страница 22

Просмотреть онлайн или скачать pdf Техническое руководство для Сервер Dell PowerEdge M910. Dell PowerEdge M910 46 страниц. M-series blade servers
Также для Dell PowerEdge M910: Руководство по обновлению (44 страниц), Руководство по обновлению (21 страниц), Руководство по обновлению (14 страниц), Руководство по установке (7 страниц), Руководство по обновлению (28 страниц), Руководство по началу работы (12 страниц), Руководство по началу работы (12 страниц), Руководство по портфолио (27 страниц), Техническое руководство (45 страниц), Руководство по началу работы (14 страниц), Руководство по началу работы (12 страниц), Техническое руководство (49 страниц)

Печатать страницу
Dell PowerEdge M910 Техническое руководство
Dell
Model
X6550
E7540
E6540
E7530
E6510
L7555
L7545
E7520

6.4 Processor Configurations

The PowerEdge M910 is designed to support either a dual CPU configuration with FlexMem Bridge or a
4 CPU configuration. In either configuration, all IO and memory is available in the system. While not
formally supported, single CPU configurations with a processor installed in CPU1 will allow the
system to boot for diagnostic purposes.
The Intel Xeon E7-2800 product family and Intel Xeon processor 6500 series are for 2-socket
configurations only and cannot be upgraded to 4-socket configurations.

6.5 FlexMem Bridge

In a 4-CPU configuration, the PowerEdge M910 uses only one memory controller per processor. This
single controller connects to two memory buffers via Intel SMI links. Each memory buffer in turn
connects to four DDR3 DIMMs. In a typical Intel Xeon processor 6500/7500 series configuration, only
the memory buffers associated with the two populated sockets would be connected, and therefore
only 16 DIMMs would be accessible.
To overcome this limitation with 2 CPUs, the M910 uses the FlexMem Bridge that allows CPU1 and
CPU2 to connect to the memory of their respective adjacent sockets (CPU3 and CPU4). The FlexMem
Bridge provides the following:
Two pass-through links for SMI
One pass-through link for QPI
The pass-through SMI links connect the two installed processors to additional SMIs, therefore the
processors will have the following memory attached:
CPU1 has access to DIMMs [A1:A8] and DIMMs [C1:C8] (those normally associated
with CPU3)
CPU2 has access to DIMMs [B1:B8] and DIMMs [D1:D8] (those normally associated
with CPU4)
The pass-through QPI link on the FlexMem Bridge provides increased performance for a 2P
configuration because it allows 2 full-bandwidth QPI links between CPU1 and CPU2 as opposed to a
single link. Figure 3 depicts the interconnection between the CPU sockets as well as connections
internal to the FlexMem Bridges. The FlexMem Bridges are only supported in sockets 3 and 4.
PowerEdge M910 Technical Guide
Speed
TDP Power
2.00GHz
130W
2.00GHz
105W
2.00GHz
105W
1.86GHz
105W
1.73GHz
105W
1.86GHz
95W
1.86GHz
95W
1.86GHz
95W
Cache
Cores
QPI Speed
18M
8
6.4GT/s
18M
6
6.4GT/s
18M
6
6.4GT/s
12M
6
5.86GT/s
12M
4
4.8GT/s
24M
8
5.86GT/s
18M
6
5.86GT/s
18M
4
4.8GT/s
22