Cisco UCS B22 M3 Указания по установке и обслуживанию - Страница 23
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Each CPU in a Cisco UCS B22 blade server supports 3 channels of 2 memory slots each. In a 1 DPC configuration, DIMMs are in
slot 0 only. In a 2 DPC configuration, DIMMs are in both slot 0 and slot 1. The table below shows the preferred order for installing
upgrade DIMMs, and while other configurations may work if problems arise moving them to the preferred arrangement should help.
Table 2: Preferred DIMM Population Order
DIMMs per CPU
CPU 1 installed slots
1
B0
2
B0, C0
3
B0, C0, D0
4
B0, C0, D0, B1
5
B0, C0, D0, B1, C1
6
B0, C0, D0, B1, C1, D1
Memory Performance
When considering the memory configuration of your blade server, there are several things you need to consider. For example:
• DIMMs within the blade server should be configured in complete banks for optimal performance.
• Your selected CPU(s) can have some affect on performance.
Bandwidth and Performance
Recommendations for achieving performance of 1600 MHz on B22 M3 servers:
• Ensure that both the installed CPU and the selected DIMMs support operation at 1600 MHz. If either cannot support this, the
pair will run at the highest speeed of the slower of the two.
• Ensure the server is running the 2.0(2) or later BIOS version. If a BIOS upgrade is needed, do it before installing processors or
memory.
• Use only Cisco certified DIMMs that support 1600 MHz speeds. DIMMs do not have to be identical in type or capacity, but
beware of the caveats listed in the section below regarding performance degradation.
• Always set the system BIOS to operate the DIMMs in "Performance" mode in order to run at 1600 MHz.
• Fully populating 1 logical bank or 2 logical banks with DIMMs will ensure optimal memory bandwidth running at the 1600
MHz speed. If DIMMs are partially populated in 1 bank (less than 6 DIMMs) or 2 bank patterns (less than 12 but greater than
6 DIMMs) the 1600 MHz speed can be used, but the overall memory bandwidth will not be optimal.
Performance Degradation
Performance degradation can occur if the following memory configurations are used:
• Mixing DIMM sizes and densities within a channel
CPU 2 installed slots
F0
F0, G0
F0, G0, H0
F0, G0, H0, F1
F0, G0, H0, F1, G1
F0, G0, H0, F1, G1, H1
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