Motorola RADIUS GM300 Руководство по эксплуатации - Страница 30
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Name of Manual
phase detector A is applied to phase detector B. There
are two output signals for phase detector B, phase R
(U101-16) and phase V (U101-15), which consist of
pulses whose pulse width depends on the phase error
between the two signals at phase detector A. If the fre-
quency f
is greater than fR, then error information is
V
provided by phase V pulsing low, while phase R
remains essentially high. When f
phase, both phase V and phase R remain high, except
for a small minimum time period, and they both pulse
low in phase. These pulses are applied to the charge
pump and are used to correct (steer) the VCO fre-
quency.
The above discussion is for a UHF radio with a 5 kHz
reference frequency. VHF radios use a divide-by-64/65
prescaler, and the receive VCO frequency is equal to
the receive frequency plus 45.1 MHz. Either a 5 or
6.25 kHz reference frequency may be used depending
on the desired frequencies and channel spacing.
When the synthesizer is locked, U101-7 applies a high
level signal with very narrow negative-going pulses to
the out-of-lock detector. The very narrow low pulses
have a high average DC level that is not sufÞcient to
turn on transistor Q101. This keeps the voltage across
C102 low, which indicates an in-lock condition.
When the synthesizer is out-of-lock, the output of
U101-7 becomes a pulsating DC signal with an average
DC level that varies between 0.5V and 4.4V. This turns
on Q101 and charges C102 to at least 3.0 volts, indicat-
ing an out-of-lock condition. Transmitter output and
receiver audio are inhibited under these circumstances.
The 5V DC operating voltage for the synthesizer and
prescaler is derived from a voltage divider buffered by
Q106. Due to the low and relatively constant current
drain requirements, a more elaborate regulator is
unnecessary.
Charge Pump
The charge pump consists of Q102-Q105. The phase V
(U101-15) signal from the PLL IC is applied to Q103
while phase R (U101-16) is applied to Q102. Then the
synthesizer is locked, both signals consist of a pulse
train with a period of 160 or 200 usec and negative-
going pulses. The phase R negative pulse turns off
Q102 and brings the emitter of Q104 to 9.6V which
turns on Q104. The negative pulse of phase V turns
Q103 off which reduces the current ßow to R114 and in
turn reduces the voltage across R114. This will cause
Q105 to turn on and sink current from Q104.
When the synthesizer reaches lock, the voltage at the
steering line will be between 1.3V and 7.8 V DC. When
the synthesizer is reprogrammed to a new frequency,
the previous SL voltage would now give a wrong fre-
quency and will cause the phase R and phase V to have
different pulse widths. This will cause Q104 and Q105
to turn on and off at different times, resulting in a series
March, 1997
and f
are both in
V
R
68 No.
of summed current pulses to the loop Þlter that charges
or discharges C110 to the new SL voltage. If the fre-
quency of the VCO is higher than that of phase R, then
C110 discharges; if lower, C110 charges.
Loop Filter
The loop Þlter consists of R119 through R121 and C109
through C112, as well as C205 and C258 in the VCO
compartment. The loop Þlter is a low pass Þlter that
attenuates noise and rejects the loop reference fre-
quency so that these signals cannot modulate the VCO.
The voltage across C110 is the steering line voltage
which controls the VCO frequency.
Reference Oscillator
The reference oscillator is a Colpitts design using a
14.4 MHz crystal element. Each crystal has a unique 8-
digit temperature coefÞcient code which must be
keyed into the radio during chassis auto tune. The ref-
erence oscillator is warped to the desired range by
adjusting L151 while supplying 5.2 ± 0.01V DC at J6-9.
Further frequency warp adjustment is done electroni-
cally by changing the control voltage applied to varac-
tors CR151 and CR152 by the logic board.
Temperature compensation is applied in the same
manner, based on the temperature of the crystal as
sensed by zener diode VR176, which is physically close
to Y151. The forward voltage drop of this diode is pro-
portional to the actual crystal temperature. This for-
ward voltage is ampliÞed by a precision DC ampliÞer,
U176 and associated components, to a DC level sufÞ-
cient to be read by one of the A/D inputs of the micro-
computer on the logic board. The appropriate control
voltage is applied, based on the crystalÕs temperature
coefÞcient code, to maintain ± 2.5 ppm stability over the
entire operating temperature range.
For transmissions of PL/DPL or data with low-fre-
quency content, the reference oscillator is modulated to
extend the low frequency modulation capability of the
synthesizer below the loop Þlter cutoff frequency.
Modulation is applied to the frequency control varac-
tors CR151 and CR152 via J6-13 and REF MOD adjust
pot R164.
VCO's and Buffers
Two VCOÕs are used, one for transmit and one for
receive. These are selected by switching circuitry Q277
through Q279, which applies 8.5V DC supply voltage
to the appropriate oscillator and buffers. The incoming
9.6V DC voltage is Þrst Þltered by Q276 to remove
noise which might be introduced into the VCOÕs. Q276
acts as a C- multiplier, which effectively multiplies the
capacitance of C277 by the gain of transistor Q276. In
the receive mode, J6-4 is pulled high by R276, turning
off Q277 and Q278, allowing Q279 to conduct and sup-
ply RX 8.5V. In the transmit mode, J6-4 is pulled low by
Theory of Operation
RF Board
2-5