Yamaha HTR-5280 - AV Receiver - 5.1 Channel Руководство по эксплуатации - Страница 28

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RX-V800/RX-V800RDS/HTR-5280
No.
Name
I/O
76
VSS
77
VDD2
78
RAMD0
I+/O
79
RAMD1
I+/O
80
RAMD2
I+/O
81
RAMD3
I+/O
82
ZEROBF1R
O+
83
ZEROBF1L
O+
84
ZEROBF0R
O+
85
ZEROBF0L
O+
86
RAMD4
I+/O
87
RAMD5
I+/O
88
RAMD6
I+/O
89
RAMD7
I+/O
90
VSS
91
VDD1
92
RAMD8
I+/O
93
RAMD9
I+/O
94
RAMD10
I+/O
95
RAMD11
I+/O
96
RAMD12
I+/O
97
RAMD13
I+/O
98
RAMD14
I+/O
99
RAMD15
I+/O
100
CASN
O
101
RAMWEN
O
102
RAMOEN
O
103
RASN
O
104
VSS
105
VDD1
106
RAMA8
O
107
RAMA7
O
108
RAMA0
O
109
RAMA6
O
110
RAMA1
O
111
RAMA5
O
112
RAMA2
O
113
SELI13
I+
114
SELI12
I+
115
SELI11
I+
116
SELI10
I+
117
SELI9
I+
118
RAMA4
O
119
RAMA3
O
120
RAMA9
O
121
RAMA10
O
122
RAMA11
O
123
VSS
124
VDD2
125
SELI8
I+
126
SELI7
I+
127
SELI6
I+
128
SELI5
I+
129
RAMA12
O
130
RAMA13
O
131
RAMA14
O
132
RAMA15
O
133
RAMA16
O
134
RAMA17
O
135
OVFB/END
O
136
ZEROFLG
O
137
VSS
138
NONPCM
O
139
DTSDATA
O
140
AC3DATA
O
141
MUTE
O
142
KARAOKE
O
143
VDD1
144
SURENC
O
145
CRC
O
146
/LOCK
O
147
DIRINT
O
148
/CS
Is
149
SO
Ot
150
SI
Is
151
SCK
Is
152
/IC
Is
153
IPINT
O+
27
Function
GND
+2.5V power supply (for internal circuit)
SubDSP: Data terminal 0 for external memory
SubDSP: Data terminal 1 for external memory
SubDSP: Data terminal 2 for external memory
SubDSP: Data terminal 3 for external memory
SDOB1 Rch zero flag output terminal
SDOB1 Lch zero flag output terminal
SDOB0 Rch zero flag output terminal
SDOB0 Lch zero flag output terminal
SubDSP: Data terminal 4 for external memory
SubDSP: Data terminal 5 for external memory
SubDSP: Data terminal 6 for external memory
SubDSP: Data terminal 7 for external memory
GND
+3.3V power supply (for terminal block)
SubDSP: Data terminal 8 for external memory
SubDSP: Data terminal 9 for external memory
SubDSP: Data terminal 10 for external memory
SubDSP: Data terminal 11 for external memory
SubDSP: Data terminal 12 for external memory
SubDSP: Data terminal 13 for external memory
SubDSP: Data terminal 14 for external memory
SubDSP: Data terminal 15 for external memory
SubDSP: Column address strobe output terminal for external DRAM
SubDSP: Write enable output terminal for external memory
SubDSP: Output enable output terminal for external memory
SubDSP: Low address strobe output terminal for external DRAM
GND
+3.3V power supply (for terminal block)
SubDSP: Address terminal 8 for external memory
SubDSP: Address terminal 7 for external memory
SubDSP: Address terminal 0 for external memory
SubDSP: Address terminal 6 for external memory
SubDSP: Address terminal 1 for external memory
SubDSP: Address terminal 5 for external memory
SubDSP: Address terminal 2 for external memory
Built-in selector input 13
Built-in selector input 12
Built-in selector input 11
Built-in selector input 10
Built-in selector input 9
SubDSP: Address terminal 4 for external memory
SubDSP: Address terminal 3 for external memory
SubDSP: Address terminal 9 for external memory
SubDSP: Address terminal 10 for external memory
SubDSP: Address terminal 11 for external memory
GND
+2.5V power supply (for internal circuit)
Built-in selector input 8
Built-in selector input 7
Built-in selector input 6
Built-in selector input 5
SubDSP: Address terminal 12 for external memory
SubDSP: Address terminal 13 for external memory
SubDSP: Address terminal 14 for external memory
SubDSP: Address terminal 15 for external memory
SubDSP: Address terminal 16 for external memory
SubDSP: Address terminal 17 for external memory
SubDSP: Overflow / program end detect terminal
MainDSP: Zero flag output terminal
GND
Main DSP: non-PCM data detect terminal
MainDSP: DTS data detect terminal
MainDSP: AC-3 data detect terminal
MainDSP: Auto mute detect terminal
MainDSP: AC-3 Karaoke data detect terminal
+3.3V power supply (for terminal block)
MainDSP: AC-3 2/0 mode Dolby Surround Encode input detect terminal
MainDSP: AC-3 CRC error detect terminal
DIR: PLL lock detect terminal
DIR: Interrupt output terminal
Microprocessor interface chip select input terminal
Microprocessor interface data output terminal
Microprocessor interface data input terminal
Microprocessor interface clock input terminal
Initial clear input terminal
Output terminal for interrupt by IPORT8-14