Yamaha HTR-5920 Руководство по эксплуатации - Страница 34
Просмотреть онлайн или скачать pdf Руководство по эксплуатации для Приемник Yamaha HTR-5920. Yamaha HTR-5920 38 страниц. Digital home theater system
av receiver
Также для Yamaha HTR-5920: Руководство пользователя (45 страниц)
Печатать страницу
A
B
HTR-5920
1
FRONT
2
3
4
5
Page 31
I5
to INPUT_CN11
6
7
8
# All voltages are measured with a 10M /V DC electronic volt meter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
9
34
C
D
E
F
G
Page 33
to AMP (1) _BN96
Page 33 G4
to AMP (2) _CN96
BASS/TREBLE -
BASS/TREBLE +
FRONT (1)
H
I
J
J2
FRONT (3)
PHONES
FRONT (2)
IC81 : TMP87PS71
Microprocessor
I/O Ports
Output Ports
P97
P87
to
to
P90
P80
VDD
P9
P8
Power Supply
VSS
VFT Power
VKK
VFT drive circuit (automatic display)
Supply
P S W
Flags
RBS
ALU
Reset I/O
RESET
System Controller
TEST
Test Pin
Standby Controller
Timing Generator
Time Base
Timer
XIN
High
Resonator
connecting
XOUT
frequ.
Clock
Pins
Generator
Low
Watchdog
frequ.
Timer
P2
P0
P22
P07
to
to
P20
P00
64
63
62
61
60
59
58
(SIS) P97
65
VKK
66
(KEY0) P40
67
(KEY1) P41
68
(KEY2) P42
69
(KEY3) P43
70
(KEY4) P44
71
(KEY5) P45
72
(CIN5/KEY6) P46
73
(CIN4/KEY7) P47
74
(CIN3) P50
75
(CIN2) P51
76
(CIN1) P52
77
(CIN0) P53
78
P54
79
(PWM/PDO) P55
80
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
K
L
I/O Ports
P77
P67
to
to
P70
P60
P7
P6
Key scan
control
Program counter
Stack Pointer
Data Memory
(RAM)
Program Memory
Register banks
(ROM)
Interrupt Controller
Inst.
Register
Inst.
16-bit
8-bit
Serial
Decoder
Timer/Counters
Timer/Counters
Interfaces
TC1
TC2
TC3
TC4
SIO
HSO
6-bit
Comparator
P1
P3
P5
P4
P17
P37
P55
P47
to
to
to
to
P10
P30
P50
P40
I/O Ports
57
56
55
54 53 52 51 50 49 48 47 46 45 44 43 42 41
40
P66 (G9)
39
P65 (G10)
38
P64 (G11)
P63 (G12)
37
36
P62 (G13)
35
P61 (G14)
P60 (G15)
34
33
VDD
32
P07
31
P06
30
P05
P04
29
28
P03
P02
27
26
P01
25
P00