ARP 1601 Руководство по эксплуатации - Страница 5
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2
THEORY
OF OPERATION
2.1
Sequencer
The
heart of the
sequencer
is
the
Counter/Latch
circuit
which produces
a
four
bit
binary
number.
When
initially
reset,
the
output
of
the
counter
is
0000
(Position
1
code), or
zero.
Each time
the
counter
receives
a
pulse
from
the
Mask
circuit,
the
counter advances
to the
next binary
number
(0001,
0010,
0011,
0100... 1111).
The
highest
binary
number,
1111, corresponds
to position
1
6.
This
code
is
supplied
to
the
Decoder
circuit
which
decodes
the binary
number
to
one
of
16
outputs.
For
example,
when
the
code
0000
is
present
on
the
output
of the counter, the
decoder
will
turn
on
the
position
1
output
(only);
when
the
code 0001
is
present
on
the
output
of the counter, the
decoder
will
turn
on
only the
position 2
output,
etc.
When
in
the
"8
X
2"
mode,
a
three
bit
code
is
supplied
from
the
counter
instead of four.
Positions
1
through 8 and 9 through 16
in
the
Decoder
circuit
simultaneously
decode
so that
bank
A
(1-8)
and
B
(9-16)
sequence
in
parallel.
The
Voltage
Controlled
Low
Frequency
Clock
determines
when
the
counter
is
advanced
to
the
next
position
by
pulsing
a
one
shot
circuit.
The
one
shot
in
turn
supplies
a
pulse to
the
Mask
circuit
which
advances
the
counter
and
disables
(masks) the
gate
outputs during the count advance.
When
the
sequencer
is
in
the
random mode,
the
Randomizer
circuit
advances
the
counter
at
an
extremely
high
frequency.
For each
cycle of the
low frequency
clock,
a
position
number
on
the
output
of
the counter
is
memorized
and
held
until
the
next clock
pulse.
Since the counter
is
being
advanced
so
fast,
the position
numbers which
are
memorized
will
be
random.
2.2
Quantizer
Voltages
which
are
to
be quantized
to the nearest
whole
twelfth of
a
volt are
applied to the
"A"
or
"B"
input of the
quantizer."
One
quantizer
circuit
is
multiplexed
by
switching
between one
of the
two
inputs
(A and
B) to
provide
two
independent quan-
tized
control
voltage
outputs.
The
voltages are
quantized
and
stored
extremely
quickly,
so
that
two
different
voltages are
quantized (one
at
a
time)
faster
than can be detected by the
ear.
As
in
a
standard
keyboard,
a
resistor
chain of equal value
resistors
make
up
a
voltage divider to generate
a
voltage
reference.
The
voltages
produced by
this
reference
CV
generator
are
volts,
1/12V,
2/1
2V,
3/12V...2V
(2
octave
range).
A
high
frequency
oscillator
steps
a
counter
which
enables the
CV
generator
voltages to
be
"scanned" one
at
a
time
(0 volts
to
2
volts).
The
input voltage
which
is
to
be "quantized"
is
compared
to the reference
CV
on
the scanner
output;
if
the scanner
output
is
lower than
the input
voltage,
the
counter advances
until
the scanner voltage
is
just
higher
than
the input
voltage.
The
counter
is
then
stopped
(by the
Comparator
circuit)
and
the voltage
on
the
output
of the
scanner
is
memorized.
The
counter
is
then
reset
to zero so that the voltage
on
other input
may
be quantized
next.
IWI\
ULIL
vco
(LOW
FREQ.)
ONE
SHOT
JUHL
RAN-
DOMIZER
r-Oi
MASK
oV
SEQ/RAND. SWITCH
(IN
SEQUENTIAL
POSITION)
FIG.
2.1
SIGNAL
FLOW
COUNTER
u
u
<r
A
B
C
D
DECODER
•r
<r
A
B
C
D
DECODER
nil
1
1
ii
mini
oooooooo
oooooo
o o
1
2
3
4
5
6
7
8
9
10
1 1
12 13 14
1
5
16
POSITION
OUTPUTS
(DRIVES
LEDS
&
CV
SLIDERS)