Cypress Semiconductor CY7C1346H Технический паспорт - Страница 16

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Document History Page
Document Title: CY7C1346H 2-Mbit (64K x 36) Pipelined Sync SRAM
Document Number: 38-05672
REV.
ECN NO. Issue Date
**
347357
See ECN
*A
420879
See ECN
*B
459347
See ECN
Document #: 38-05672 Rev. *B
Orig. of
Change
PCI
New Data sheet
RXU
Converted from Preliminary to Final.
Changed address of Cypress Semiconductor Corporation on Page# 1 from
"3901 North First Street" to "198 Champion Court"
Removed 133MHz Speed bin.
Changed three-state to tri-state.
Modified test condition from V
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table.
Replaced Package Name column with Package Diagram in the Ordering
Information table.
Replaced Package Diagram of 51-85050 from *A to *B
NXR
Included 2.5V I/O option
Updated the Ordering Information table.
CY7C1346H
Description of Change
< V
< V
to V
IH
DD
IH
DD
Page 16 of 16
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