Cypress Semiconductor CY7C141 Технический паспорт - Страница 2
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Pin Configurations
Figure 2. Pin Diagram - PLCC (Top View)
7 6 5 4 3 2
1
52 51 50 49 48 47
A
1L
8
A
2L
9
A
10
3L
A
11
4L
A
5L
12
A
6L
13
7C131
A
14
7L
7C141
A
8L
15
A
16
9L
I/O
17
0L
I/O
1L
18
I/O
19
2L
I/O
20
3L
2122 23 24 25 26 27 28 29 30 31 32 33
Document #: 38-06002 Rev. *E
Figure 1. Pin Diagram - DIP (Top View)
48
CE
1
L
R/W
47
L
2
BUSY
46
L
3
INT
45
L
4
44
OE
5
L
A
43
0L
6
A
42
1L
7
A
41
2L
8
A
40
3L
9
A
39
10
4L
A
5L
11
38
A
12
37
6L
7C130
A
13
7C140
36
7L
A
14
8L
35
A
15
34
9L
I/O
16
33
0L
I/O
17
1L
32
I/O
18
2L
31
I/O
3L
19
30
I/O
20
29
4L
I/O
28
21
5L
I/O
22
27
6L
I/O
23
26
7L
24
25
GND
Figure 3. Pin Diagram - PQFP (Top View)
OE
46
R
A
45
0R
A
44
1R
A
1L
43
A
2R
A
A
2L
42
3R
A
3L
41
A
4R
A
A
40
4L
5R
A
A
5L
39
6R
A
A
6L
38
7R
A
37
A
7L
8R
A
8L
A
36
9R
A
9L
35
NC
I/O
0L
34
I/O
7R
I/O
1L
I/O
2L
I/O
3L
CY7C130, CY7C130A
CY7C131, CY7C131A
CY7C140, CY7C141
V
CC
CE
R
R/W
R
BUSY
R
INT
R
OE
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
I/O
6R
I/O
5R
I/O
4R
I/O
3R
I/O
2R
I/O
1R
I/O
0R
52 5150 49 48 47
46
45 44 43 42 41 40
1
2
3
4
5
6
7C131
7
7C141
8
9
10
11
12
13
1415 16 17 18 19 20 21 22 23 24 25 26
OE
39
R
A
38
0R
A
37
1R
A
36
2R
A
35
3R
A
34
4R
A
33
5R
A
32
6R
A
31
7R
A
30
8R
A
29
9R
NC
28
I/O
27
7R
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