Cypress Semiconductor CY7C199 Технический паспорт - Страница 7
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Switching Waveforms
[13, 14]
Read Cycle No. 2
CE
OE
HIGH IMPEDANCE
DATA OUT
V
CC
SUPPLY
CURRENT
Write Cycle No. 1 (WE Controlled)
ADDRESS
CE
WE
OE
DATA I/O
Write Cycle No. 2 (CE Controlled)
ADDRESS
CE
WE
DATA I/O
Notes:
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high impedance if OE = V
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Document #: 38-05160 Rev. **
(continued)
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
50%
[10, 15, 16]
t
AW
t
SA
t
HZOE
[10, 15, 16]
t
SA
t
AW
.
IH
t
RC
DATA VALID
t
WC
t
PWE
t
SD
DATA
VALID
IN
t
WC
t
SCE
t
SD
DATA
VALID
IN
CY7C199
t
HZOE
t
HZCE
HIGH
IMPEDANCE
t
PD
50%
t
HA
t
HD
t
HA
t
HD
Page 7 of 16
ICC
ISB
C199–9
C199–10
C199–11