Cypress Semiconductor NoBL CY7C1352G Технический паспорт - Страница 12

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Document History Page
Document Title: CY7C1352G 4-Mbit (256K x 18) Pipelined SRAM with NoBL™ Architecture
Document Number: 38-05514
Issue
REV.
ECN NO.
Date
**
224362
See ECN
*A
288431
See ECN
*B
332895
See ECN
*C
419256
See ECN
*D
480124
See ECN
Document #: 38-05514 Rev. *D
Orig. of
Change
RKF
New data sheet
VBL
Deleted 100 MHz and 225 MHz
Changed TQFP package in Ordering Information section to lead-free TQFP
SYT
Modified Address Expansion balls in the pinouts for 100 TQFP Package as per
JEDEC standards and updated the Pin Definitions accordingly
Modified V
V
test conditions
OL,
OH
Replaced TBD's for Θ
tance table
Added lead-free product information for 119 BGA
Updated the Ordering Information by shading and unshading MPNs as per avail-
ability
RXU
Converted from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from "3901
North First Street" to "198 Champion Court"
Modified test condition from V
Modified test condition from V
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table
Replaced Package Name column with Package Diagram in the Ordering Information
table
Replaced Package Diagram of 51-85050 from *A to *B
Updated the Ordering Information
VKN
Added the Maximum Rating for Supply Voltage on V
Updated the Ordering Information table.
Description of Change
and Θ
to their respective values on the Thermal Resis-
JA
JC
< V
< V
to V
IH
DD
IH
DD
< V
to V
< V
DDQ
DD
DDQ
CY7C1352G
DD
Relative to GND.
DDQ
Page 12 of 12
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