Cypress Semiconductor Rambus XDR CY24271 Технический паспорт - Страница 6
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REFCLKB
REFCLK
Absolute Maximum Conditions
Parameter
Description
V
Clock Buffer Supply Voltage
DD
V
Core Supply Voltage
DDC
V
PLL Supply Voltage
DDP
V
Input Voltage (SCL and SDA)
IN
Input Voltage (REFCLK/REFCLKB
Input Voltage
T
Temperature, Storage
S
T
Temperature, Operating Ambient
A
T
Temperature, Junction
J
Ø
Junction to Ambient thermal resis-
JA
tance
ESD
ESD Protection (Human Body Model) MIL-STD-883, Method 3015
HBM
Document Number: 001-42414 Rev. **
Figure 2. Differential and Single-Ended Clock Inputs
Input
XDR Clock Generator
Differential Input
Relative to V
)
Relative to V
Relative to V
Non-functional
Functional
Functional
Zero air flow
Supply Voltage
V
TH
Input
REFCLK
Single-ended Input
Condition
SS
SS
SS
CY24272
XDR Clock Generator
Min
Max
Unit
–0.5
4.6
V
–0.5
4.6
V
–0.5
4.6
V
–0.5
4.6
V
–0.5
V
+ 1.0
V
DD
–0.5
V
+ 0.5
V
DD
–65
150
°C
0
70
°C
–
150
°C
–
100
°C/W
2000
–
V
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