Cypress CY3650 Kullanıcı Kılavuzu - Sayfa 14

Mikrodenetleyiciler Cypress CY3650 için çevrimiçi göz atın veya pdf Kullanıcı Kılavuzu indirin. Cypress CY3650 15 sayfaları. Usb development system

Sayfayı Yazdır
1.
NAME
IA[12:0]
ID[7:0]
IROMS_
IRAMS_
IRAMR_
IRAMW_
DB[7:0]
DA[7:0]
MR_
MW_
IOW_
IOR_
SOI
TRQ
IRQ
IRA
BRA
BRQ
RESET
MASTER RESET
CLOCK
VCC
GND
Ver 2.4
CY3650 USB Development System User's Guide
Table 4: J2 Pin Descriptions
FUNCTION
13-bit address bus for program memory
8-bit Instruction Data from program memory
Program ROM chip select (active low)
Program RAM chip select (active low)
Program RAM read enable (active low)
Program RAM write enable (active low)
8-bit RAM Data bus
8-bit RAM Address bus
Memory read enable for data RAM (active low)
Memory write enable for data RAM (active low)
I/O write enable (active low)
I/O read enable (active low)
Start of instruction - goes high at beginning of new instruction
Test Mode Request
Interrupt Request Signal
Interrupt Acknowledge
Bus Request Acknowledge
Bus Request - When high, data and address busses are driven externally
Not used
Reset signal for the board (active high)
12 MHz clock signal
Connection to development board's +5V
Ground
– 9 –