Cypress Semiconductor CY62148E Şartname Sayfası - Sayfa 5

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Cypress Semiconductor CY62148E Şartname Sayfası

Switching Characteristics

Parameter
Read Cycle
t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE LOW to Data Valid
ACE
t
OE LOW to Data Valid
DOE
t
OE LOW to LOW Z
LZOE
t
OE HIGH to High Z
HZOE
t
CE LOW to Low Z
LZCE
t
CE HIGH to High Z
HZCE
t
CE LOW to Power up
PU
t
CE HIGH to Power down
PD
[15]
Write Cycle
t
Write Cycle Time
WC
t
CE LOW to Write End
SCE
t
Address Setup to Write End
AW
t
Address Hold from Write End
HA
t
Address Setup to Write Start
SA
t
WE Pulse Width
PWE
t
Data Setup to Write End
SD
t
Data Hold from Write End
HD
t
WE LOW to High-Z
HZWE
t
WE HIGH to Low-Z
LZWE
Notes
12. Test conditions for all parameters other than tri-state parameters assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels
of 0 to 3V, and output loading of the specified I
13. At any given temperature and voltage condition, t
14. t
, t
, and t
transitions are measured when the outputs enter a high impedance state.
HZOE
HZCE
HZWE
15. The internal write time of the memory is defined by the overlap of WE, CE = V
terminate a write by going INACTIVE. The data input setup and hold timing should be referenced to the edge of the signal that terminates the write.
Document #: 38-05442 Rev. *F
[12]
(Over the Operating Range)
Description
[13]
[13, 14]
[13]
[13, 14]
[13, 14]
[13]
/I
as shown in the
"AC Test Loads and Waveforms" on page
OL
OH
is less than t
, t
HZCE
LZCE
HZOE
45 ns
Min
Max
45
45
10
45
22
5
18
10
18
0
45
45
35
35
0
0
35
25
0
18
10
4.
is less than t
, and t
is less than t
LZOE
HZWE
. All signals must be ACTIVE to initiate a write and any of these signals can
IL
CY62148E MoBL
[2]
55 ns
Unit
Min
Max
55
ns
55
ns
10
ns
55
ns
25
ns
5
ns
20
ns
10
ns
20
ns
0
ns
55
ns
55
ns
40
ns
40
ns
0
ns
0
ns
40
ns
25
ns
0
ns
20
ns
10
ns
for any given device.
LZWE
Page 5 of 10
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