Cypress Semiconductor CY62148EV30 Şartname Sayfası - Sayfa 2

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Pin Configuration

[1, 3]
36-Ball VFBGA Pinout
A
A
1
0
IO
A
4
2
IO
5
V
SS
V
CC
IO
6
IO
OE
7
A
A
10
9

Product Portfolio

Product
CY62148EV30LL VFBGA
TSOP II Ind'l/Auto-A
SOIC
Notes
3. NC pins are not connected on the die.
4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
Document #: 38-05576 Rev. *G
Top View
A
A
NC
A
6
3
8
A
WE
A
IO
4
0
7
NC
A
IO
5
1
V
cc
V
ss
A
A
IO
18
17
2
CE
A
A
IO
16
15
3
A
A
A
A
11
12
13
14
Range
V
Range (V)
CC
[4]
Min
Typ
Ind'l
2.2
3.0
Ind'l
2.2
3.0
32-Pin SOIC/TSOP II Pinout
A
17
A
16
A
A
14
A
12
A
B
7
A
6
A
5
A
C
4
A
3
A
2
D
A
1
A
0
IO
0
E
IO
1
IO
2
V
F
SS
G
H
Speed
Operating I
(ns)
f = 1 MHz
[4]
Max
Typ
Max
3.6
45
2
2.5
3.6
55
2
2.5
®
MoBL
CY62148EV30
Top View
V
CC
1
32
A
15
2
31
A
18
3
30
WE
4
29
A
5
28
13
A
8
6
27
A
7
26
9
A
11
8
25
OE
9
24
A
10
23
10
CE
22
11
IO
12
21
7
IO
13
20
6
IO
14
19
5
IO
18
15
4
IO
16
17
3
Power Dissipation
(mA)
Standby I
CC
(µA)
f = f
max
[4]
[4]
Typ
Max
Typ
15
20
1
15
20
1
= V
, T
= 25°C.
CC
CC(typ)
A
Page 2 of 12
SB2
Max
7
7
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