Cypress Semiconductor CY7B9911V Şartname Sayfası - Sayfa 2

Bilgisayar Donanımı Cypress Semiconductor CY7B9911V için çevrimiçi göz atın veya pdf Şartname Sayfası indirin. Cypress Semiconductor CY7B9911V 15 sayfaları. Cypress high speed low voltage programmable skew clock buffer specification sheet

Pin Configuration

Pin Definitions

Signal Name
IO
REF
I
Reference frequency input. This input supplies the frequency and timing against which all functional
variations are measured.
FB
I
PLL feedback input (typically connected to one of the eight outputs).
FS
I
Three level frequency range select. See
1F0, 1F1
I
Three level function select inputs for output pair 1 (1Q0, 1Q1). See
2F0, 2F1
I
Three level function select inputs for output pair 2 (2Q0, 2Q1). See
3F0, 3F1
I
Three level function select inputs for output pair 3 (3Q0, 3Q1). See
4F0, 4F1
I
Three level function select inputs for output pair 4 (4Q0, 4Q1). See
TEST
I
Three level select. See
1Q0, 1Q1
O
Output pair 1. See
2Q0, 2Q1
O
Output pair 2. See
3Q0, 3Q1
O
Output pair 3. See
4Q0, 4Q1
O
Output pair 4. See
V
PWR
Power supply for output drivers.
CCN
V
PWR
Power supply for internal circuitry.
CCQ
GND
PWR
Ground.
Document Number: 38-07408 Rev. *D
PLCC
4
3
2
1
32 31 30
5
3F1
4F0
6
4F1
7
V
8
CCQ
CY7B9911V
V
9
CCN
4Q1
10
4Q0
11
GND
12
GND
13
14
15
16
17
18 19 20
Table
"Test Mode"
on page 4 under the
Table
2.
Table
2.
Table
2.
Table
2.
3.3V RoboClock+™
2F0
29
28
GND
27
1F1
26
1F0
25
V
CCN
24
1Q0
23
1Q1
22
GND
21
GND
Description
1.
Table
Table
Table
Table
"Block Diagram Description"
CY7B9911V
2.
2.
2.
2.
on page 3.
Page 2 of 14
[+] Feedback