Cypress Semiconductor CY7C1041DV33 Şartname Sayfası - Sayfa 2
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Selection Guide
Description
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
Pin Configuration
Figure 2. 48-Ball VFBGA (Pinout 1)
1
2
3
A
BLE
OE
0
IO
A
BHE
0
3
IO
A
IO
2
5
1
IO
V
A
SS
3
17
V
NC
IO
CC
4
A
IO
IO
14
5
6
A
IO
NC
12
7
A
A
NC
9
8
2. Automotive product information is Preliminary.
3. NC pins are not connected on the die.
4. Pinout 1 is compliant with CY7C1041CV33 and pinout 2 is JEDEC compliant. The difference between the two is that the higher and lower byte IOs (IO
balls) are swapped.
-10 (Industrial)
Figure 1. 44-Pin SOJ/TSOP II
A
1
0
A
2
1
A
3
2
A
4
3
A
5
4
6
CE
IO
7
0
IO
8
1
IO
9
2
IO
10
3
V
11
CC
V
12
SS
IO
13
4
IO
14
5
IO
15
6
IO
16
7
WE
17
A
18
5
A
19
6
A
20
7
A
21
8
A
22
9
[3, 4]
4
5
6
A
A
NC
A
2
1
A
CE
IO
B
4
8
C
A
IO
IO
6
10
9
IO
A
V
D
CC
7
11
A
IO
V
E
SS
16
12
IO
F
A
IO
14
15
13
A
IO
G
WE
13
15
A
A
NC
H
10
11
-12 (Automotive)
10
90
10
A
44
17
A
43
16
A
42
15
OE
41
BHE
40
39
BLE
38
IO
15
37
IO
14
IO
36
13
35
IO
12
34
V
SS
33
V
CC
32
IO
11
IO
31
10
IO
30
9
29
IO
8
28
NC
27
A
14
26
A
13
25
A
12
24
A
11
23
A
10
Figure 3. 48-Ball VFBGA (Pinout 2)
1
2
3
A
BLE
OE
0
IO
A
BHE
8
3
IO
A
IO
10
5
9
IO
V
A
SS
11
17
V
NC
IO
CC
12
A
IO
IO
14
13
14
A
IO
NC
12
15
A
A
NC
9
8
CY7C1041DV33
[2]
Unit
12
ns
95
mA
15
mA
[3, 4]
4
5
6
A
A
NC
A
2
1
A
CE
IO
B
4
0
C
A
IO
IO
6
1
2
IO
A
V
D
CC
7
3
A
V
IO
E
SS
16
4
IO
F
A
IO
6
15
5
A
IO
G
WE
13
7
A
A
NC
H
10
11
and IO
[7:0]
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