Cypress Semiconductor CY7C68023 Şartname Sayfası - Sayfa 3
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3.2
Pin Descriptions
Pin
Name
Type
16
Reserved
N/A
17
VCC
PWR
18
DDO
I/O
19
DD1
I/O
20
DD2
I/O
21
DD3
I/O
22
DD4
I/O
23
DD5
I/O
24
DD6
I/O
25
DD7
I/O
26
GND
GND
27
VCC
PWR
28
GND
GND
29
WE#
O
30
RE0#
O
31
RE1#
O
32
VCC
PWR
33
CLE
O
34
ALE
O
35
LED1#
O
36
LED2#
O
37
WP_NF#
O
38
WP_SW#
I
39
N/C
N/A
40
N/C
N/A
41
GND
GND
42
RESET#
I
43
VCC
PWR
44
Reserved
N/A
45
CE0#
O
46
CE1#
O
47
CE2#
O
48
CE3#
O
49
CE4#
O
50
CE5#
O
51
CE6#
O
52
CE7#
O
53
GND
GND
54
N/C
N/A
55
VCC
PWR
56
GND
GND
Document #: 38-08055 Rev. *B
(continued)
Default State at Start-up
N/A
PWR
Z
Z
Z
Z
Z
Z
Z
Z
GND
PWR
GND
H
H
H
PWR
Z
Z
Z
Z
Z
Z
N/A
N/A
GND
Z
PWR
N/A
Z
Z
Z
Z
Z
Z
Z
Z
GND
N/A
PWR
GND
CY7C68023/CY7C68024
Description
Must be tied HIGH (no pull-up resistor required)
3.3V supply
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Ground
3.3V supply
Ground
Write enable
Read Enable 0
Read Enable 1
3.3V supply
Command latch enable
Address latch enable
Data activity LED sink
Chip active LED sink
Write-protect NAND Flash
Write-protect switch input
No connect
No connect
Ground
NX2LP chip reset
3.3V supply
Must be tied HIGH
Chip enable 0
Chip enable 1
Chip enable 2
Chip enable 3
Chip enable 4
Chip enable 5
Chip enable 6
Chip enable 7
Ground
No connect
3.3V supply
Ground
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