Cypress Semiconductor MoBL CY62128E Şartname Sayfası

Bilgisayar Donanımı Cypress Semiconductor MoBL CY62128E için çevrimiçi göz atın veya pdf Şartname Sayfası indirin. Cypress Semiconductor MoBL CY62128E 12 sayfaları. 1-mbit (128k x 8) static ram

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Features
Very high speed: 45 ns
■
Temperature ranges
■
Industrial: –40°C to +85°C
❐
Automotive-A: –40°C to +85°C
❐
Automotive-E: –40°C to +125°C
❐
Voltage range: 4.5V to 5.5V
■
Pin compatible with CY62128B
■
Ultra low standby power
■
Typical standby current: 1 μA
❐
Maximum standby current: 4 μA (Industrial)
❐
Ultra low active power
■
Typical active current: 1.3 mA at f = 1 MHz
❐
Easy memory expansion with CE
■
Automatic power down when deselected
■
CMOS for optimum speed and power
■
Offered in standard Pb-free 32-pin STSOP, 32-pin SOIC, and
■
32-pin TSOP I packages
Logic Block Diagram
CE 1
CE 2
Note
1. For best practice recommendations, refer to the Cypress application note "System Design Guidelines" at
Cypress Semiconductor Corporation
Document #: 38-05485 Rev. *F
, CE
and OE features
1
2,
INPUT BUFFER
A 0
A 1
A 2
A 3
A 4
A 5
128K x 8
A 6
A 7
ARRAY
A 8
A 9
A 10
A 11
COLUMN DECODER
WE
OE
•
198 Champion Court
1-Mbit (128K x 8) Static RAM

Functional Description

[1]
The CY62128E
is a high performance CMOS static RAM
organized as 128K words by 8 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device into standby mode reduces power consumption by more
than 99 percent when deselected (CE
eight input and output pins (IO
impedance state when the device is deselected (CE
CE
LOW), the outputs are disabled (OE HIGH), or a write
2
operation is in progress (CE
LOW and CE
1
To write to the device, take Chip Enable (CE
HIGH) and Write Enable (WE) inputs LOW. Data on the eight IO
pins (IO
through IO
) is then written into the location specified
0
7
on the address pins (A
through A
0
To read from the device, take Chip Enable (CE
HIGH) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins appear on the IO pins.
POWER
DOWN
http://www.cypress.com.
,
•
San Jose
CA 95134-1709
®
MoBL
CY62128E
®
) in portable
HIGH or CE
LOW). The
1
2
through IO
) are placed in a high
0
7
HIGH or
1
HIGH and WE LOW)
2
LOW and CE
1
).
16
LOW and CE
1
IO 0
IO 1
IO 2
IO 3
IO 4
IO 5
IO 6
IO 7
•
408-943-2600
Revised August 4, 2008
2
2
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