Cypress Semiconductor Rambus XDR CY24271 Şartname Sayfası - Sayfa 8
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AC Operating Conditions
The AC operating conditions follow.
Parameter
t
REFCLK, REFCLKB input cycle time
CYCLE,IN
t
Input Cycle to Cycle Jitter
JIT,IN(cc)
[10]
t
Input Duty Cycle
DCIN
t
/ t
Rise and Fall Times
RIN
FIN
Δt
/ t
Rise and Fall Times Difference
RIN
FIN
[11]
p
Modulation Index for triangular modulation
MIN
Modulation Index for non-triangular modulation
[11]
f
Input Frequency Modulation
MIN
t
Input Slew Rate (measured at 20%–80% of
SR,IN
input voltage) for REFCLK
C
Capacitance at REFCLK inputs
IN,REF
C
Capacitance at CMOS inputs
IN,CMOS
f
SMBus clock frequency input in SCL pin
SCL
DC Electrical Specifications
Parameter
[6]
V
Differential output crossing point voltage
OX
[6]
V
Output voltage swing (peak-to-peak single-ended)
COS
V
Absolute output low voltage at CLK[3:0], CLK[3:0]B
OL,ABS
V
Reference voltage for swing controlled current, I
ISET
[7]
I
Power Supply Current at 2.625V, f
DD
[7]
I
Power Supply Current at 2.625V, f
DD
I
I
Ratio of output low current to reference current
OL/
REF
I
Minimum current at V
OL,ABS
V
SDA output low voltage at test condition of SDA output low current = 4 mA
OL,SDA
I
SDA output low voltage at test condition of SDA voltage = 0.8V
OL,SDA
I
Current during High Z per pin at CLK[3:0], CLK[3:0]B
OZ
Z
Output dynamic impedance when clock output signal is at V
OUT
Notes
9. Jitter measured at crossing points and is the absolute value of the worst case deviation.
10. Measured at crossing points.
11. If input modulation is used; input modulation is allowed but not required.
12. The amount of allowed spreading for any non-triangular modulation is determined by the induced downstream tracking skew that cannot exceed the skew generated
by the specified 0.6% triangular modulation. Typically, the amount of allowed non-triangular modulation is about 0.5%.
13. V
is measured on external divider network.
OX
14. V
= (clock output high voltage – clock output low voltage), measured on the external divider network.
COS
15. V
is measured at the clock output pins of the package.
OL_ABS
16. I
is equal to V
/R
.
REF
ISET
RC
17. Minimum I
is measured at the clock output pin with R
OL,ABS
18. Z
is defined at the output pins as (0.94V – 0.90V)/(I
OUT
Document Number: 001-42414 Rev. **
[6]
Description
[9]
Description
[13]
= 100 MHz, and f
ref
= 133 MHz, and f
ref
[17]
OL,ABS
= 266 ohms or less.
RC
– I
) under conditions specified for I
0.94
0.90
Condition
REFSEL = 0, /BYPASS = High
REFSEL = 1, /BYPASS = High
/BYPASS = Low
Over 10,000 cycles
Measured at 20%–80% of input
voltage for REFCLK and
REFCLKB inputs
Min
[14]
[15]
0.85
0.98
REF
= 300 MHz
out
= 667 MHz
out
[16]
[18]
= 0.9V
1000
OL
.
OL, ABS
CY24272
Min
Max
Unit
9
11
ns
7
8
ns
4
–
ns
–
185
ps
40%
60%
t
CYCLE
175
700
ps
–
150
ps
–
0.6
[12]
–
0.5
30
33
kHz
1
4
V/ns
–
7
pF
–
10
pF
DC
100
kHz
Typ
Max
Unit
–
1.08
–
V
–
400
–
mV
–
–
V
1.0
1.02
V
–
–
85
mA
–
–
125
mA
6.8
7.0
7.2
25
–
–
mA
–
–
0.4
V
6
–
–
mA
μA
–
–
10
Ω
–
–
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