Adeunis RF ARF26 Посібник користувача - Сторінка 4

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• Timings

Programming of a register is performed according to the following timing diagram:

N.B.:

- The number of pulses for SCK corresponds to the number of bits to be sent and depends on

the register. In the example above, there are 37 clock pulses that correspond to the longest

- Between programming of 2 registers, SLE must be kept at "1" for a minimum time of

200 ns.

- The content of the registers (address included) for each operating mode is specified in the

following paragraphs. When programming a register, it is imperative to send the specified

number of bits (cf. tables below), no more no less, to avoid an incorrect programming.

In transmission mode, three 37-bit registers (the control register CTRL1 and frequency

registers F0 and F1) and one 7-bit register (control register CTRL3) have to be configured.

Programming of the registers must begin with F0, followed by F1, then CTRL3 and finish

with CTRL1. The table below presents the content of the registers according to the channel:

Channel

F0 (hex)

37 bits

019CD440E2

01A57D72C4

01FD05E6DE

01019DF274

0188C45666

018804F4EE

01405DE244

01059DC6F4

01FC3DE658

05-11-V3-psn

F1 (hex)

CTRL3 (hex)

37 bits

7 bits

03085464E6

034465D4C4

03449DC4FA

0380CDF472

03855552F4

03B195D248

03518540C4

03A1154240

03506D467E

CTRL1 (hex)

37 bits

09DB005260

09DB002260