DG SATA-IP Інструкція - Сторінка 4
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Друкувати сторінкуdg_sata_ip_dev_demo_instruction_at7_en.doc
9. Download and program configuration file and firmware to AC701 by using Vivado tool, as
shown in Figure 2-5.
10. After FPGA starts operation, check GPIO LEDs status on AC701 board at LED0-LED1
that must be ON, as shown in Figure 2-6. Each LED description is described in Table 2-1.
Table 2-1 LED Status of device reference design on AC701 board
LED
LED0 OK 150 MHz of SATA clock on CLKSMA cannot lock.
LED1 OK SATA-IP cannot detect SATA-II host (PC).
LED2 Always OFF
LED3
17-Jun-21
Figure 2-5 Programming configuration file
Figure 2-6 LED status after system set up complete
ON
Please check 150 MHz clock source on CLKSMA board.
Please check SATA-II host and the connection.
OFF
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