DG USB3D-IP Посібник - Сторінка 5

Переглянути онлайн або завантажити pdf Посібник для Материнська плата DG USB3D-IP. DG USB3D-IP 16 сторінок. Usb3.0 device function ip-core

dg_usb3.0_dev_ip_demo_instruction_en.doc

Power up all boards, run ALTERA Programmer on the PC, and download evaluation sof-file to the

•

FPGA. After download finish, close Programmer software. (At this timing, (FPGA operation is

already running and FPGA is waiting JTAG UART output.)

Run nios2-terminal from "ALTERA NIOS2 Command Shell" as below Figure 6.

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When JTAG UART starts its operation, it shows message as Figure 7. If nios2-terminal cannot start

•

or this message is not appeared, check USB cable or download settings of Programmer.

15 May 2015

Figure 6 6 6 6 : start nios2

Figure

: start nios2- - - - terminal

: start nios2

Figure 7 7 7 7 : Device operation start message

Figure

: Device operation start message

terminal

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