EPC EPC9041 Посібник із швидкого старту - Сторінка 2

Переглянути онлайн або завантажити pdf Посібник із швидкого старту для Материнська плата EPC EPC9041. EPC EPC9041 5 сторінок. Monolithic half-bridge with gate drive development board
Також для EPC EPC9041: Посібник із швидкого старту (5 сторінок)

QUICK START GUIDE

QUICK START PROCEDURE

The development boards are easy to set up to evaluate the perfor-
mance of the eGaNIC. The board allows the on-board placement of
buck output filter components. Refer to Figure 2 for proper connect
and measurement setup and follow the procedure below:
1. With power off, connect the input power supply bus to +V
and ground / return to –V
(J7, J8).
IN
2. With power off, connect the switch node of the half bridge OUT
(J3, J4) to your circuit as required.
3. With power off, connect the gate drive input to +V
ground return to –V
(J1, Pin-2).
DD
4. With power off, connect the input PWM control signal to PWM
(J2, Pin-1) and ground return to any of the remaining J2 pins.
5. Turn on the gate drive supply – make sure the supply is between
7 V and 12 V range.
6. Turn on the bus voltage to the required value (do not exceed the
absolute maximum voltage on V
a. EPC9036, 30 V
b. EPC9037, 60 V
c. EPC9041, 80 V
7. Turn on the controller / PWM input source and probe switching
node to see switching operation.
8. Once operational, adjust the bus voltage and load PWM control
within the operating range and observe the output switching
behavior, efficiency and other parameters.
9. For shutdown, please follow steps in reverse.
NOTE. When measuring the high frequency content switch node (OUT), care must
be taken to avoid long ground leads. Measure the switch node (OUT) by placing
the oscilloscope probe tip through the large via on the switch node (designed for
this purpose) and grounding the probe directly across the GND terminals provided.
See Figure 3 for proper scope probe technique.
EPC – EFFICIENT POWER CONVERSION CORPORATION |
(J5, J6)
IN
(J1, Pin-1) and
DD
as indicated in the table below:
OUT
Figure 3: Proper Measurement of Switch Node – OUT
WWW.EPC-CO.COM
Gate Drive Supply
V
Gate Drive
DD
Regulator
PWM
Logic and
LM5113
Input
Dead-time
Gate
Adjust
Driver
Figure 1: Block Diagram of Development Board
VERSION
7 V – 12 V
_
V
Supply
DD
+
Gate Drive Supply
(Note Polarity)
+
V
V
IN
_
(For E ciency
Measurement)
PWM Input
*
Figure 2: Proper Connection and Measurement Setup
Do not use probe ground lead
Ground probe
against TP3
Minimize loop
Place probe tip
in large via at OUT
| COPYRIGHT 2014 |
EPC9037/37/41
Monolithic
Half Bridge
Pads for Buck Output Filter
See table for max
A
Pads for Buck
I
Output Filter
IN
V
Supply
V
IN
SW
See table
for max
V
P
OUT
GND
+
V
V
OUT
_
(For E ciency
Measurement)
| PAGE 2
V
IN
VSW
OUT
+
_