Digilent D2-FT Довідковий посібник - Сторінка 4
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Друкувати сторінкуD2-FT Reference Manual
written data, an output-enable (OE) strobe that
can be used by the peripheral to enable read
data, a chip select, and a clock to enable
synchronous transfers. System bus timings
can be used to configure the lower 18 pins of
the A1, B1, and C1 connectors (the lower 18
Write Cycle
CS
OE
WE
DB0-DB7
Read Cycle
OE
WE
DB0-DB7
www.digilentinc.com
Figure 4. System Bus Timing
Table 1. System Bus Timing
Symbol
ten
Time to enable after CS asserted
th
Hold time
tdoe
Time to disable after OE de-asserted
teoe
Time to enable after OE asserted
tw
Write strobe time
tsu
Data setup time
twd
Write disable time
© Digilent, Inc.
pins of A1 and B1 share the same FPGA pins).
The diagrams below show signal timings
assumed by Digilent to create peripheral
devices. However, any bus and timing models
can be used by modifying circuits in the FPGA
and attached peripheral devices.
ten
tdoe
teoe
tw
tsu
th
teoe
tdoe
twd
th
tsu
Parameter
th
th
Read data latch time
Time (typ)
10ns
1ns
10ns
15ns
10ns
5ns
0ns
Digilent, Inc.
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