Motorola MDH65SDF9AA3AN Сервісна інформація - Сторінка 10
Переглянути онлайн або завантажити pdf Сервісна інформація для Портативний радіоприймач Motorola MDH65SDF9AA3AN. Motorola MDH65SDF9AA3AN 46 сторінок.
2-2
THEORY OF OPERATION
2.1
Receiver Front End
Incoming RF signals from the antenna are first routed through the harmonic filter and antenna
switch, part of the transmitter circuitry, before being applied to the receiver front end. The receiver
front end consists of a preselector filter, RF amplifier, an interstage filter, and a double-balanced first
mixer.
The preselector filter is a fixed-tuned 3-pole Butterworth design using discrete elements (L1-L3, C1-
C10, C12 and C523) in a shunt-resonator configuration. It has a 3 dB bandwidth of 68 MHz
centered at 480 MHz, an insertion loss of 2 dB and image attenuation of 39 dB at 405.3 MHz. Diode
CR1 protects the RF amplifier by limiting excessive RF levels. The filter bandwidth is considerably
wider than the receive band, to achieve low insertion loss in a compact size. C523 provides a
transmission-zero to improve image attenuation.
The output of the filter is matched to the base of RF amplifier Q21, which provides 18 dB of gain and
a noise figure of 3.3 dB. A BFS505 device is used for high gain, low noise figure and reduced
operating current. Operating voltage is obtained from the 5R source, which is turned off during
transmit to reduce dissipation in Q21. Current mirror Q22 maintains the operating current of Q21
constant at 8 mA regardless of device and temperature variations, for optimum dynamic range and
noise figure.
The output of the RF amplifier is applied to the interstage filter, a fixed-tuned 4-pole Butterworth
shunt-coupled resonator design having a 3 dB bandwidth of 68 MHz centered at 480 MHz, and
insertion loss of 3.3 dB. This filter yields an image rejection of 55 dB at 405.3 MHz, assisted by a
transmission-zero at 300 MHz implemented by C524 for the reasons mentioned above.
The output of the interstage filter is connected to the passive double-balanced mixer consisting of
components T41, T42, and CR41. This mixer has a conversion loss of 7.2 dB. Low-side injection
from the frequency synthesizer is filtered by L40-L41 and C41-C45 to remove second harmonic
energy that may degrade half-IF spurious rejection performance. The injection filter has a 3 dB
bandwidth of 100 MHz centered at 408 MHz, and an insertion loss of 2.5 dB. The second-harmonic
rejection is typically 40 dB or greater. The filtered injection signal is applied to T42 at a level of +6
dBm.
The mixer output is applied to a diplexer network (L51-L52, C51, R51) which matches the 44.85
MHz IF signal to crystal filter FL51, and terminates the mixer into 50Ω at all other frequencies.