Aries Embedded RISC-V on MAX10 Посібник користувача - Сторінка 13

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RISC-V on MAX10 User Guide

CHAPTER

FOUR

PROGRAMMING THE DEMOS

Note: The directory Prebuild contains a precompiled firmware image aswell as a prebuild FPGA image.

These can be used to skip the corresponding steps in this chapter.

4.1 Compiling the Firmware

Navigate to the project directory corresponding to the module (Spider_S, MX10_S8, MX10_U). The RISC-

V firmware is available as a simple, standalone version (RiscvSimple) or using FreeRTOS (RiscvFreeRTOS).

Both versions demonstrate the same functionality, a binary counter on PMod J3 and loopback on UART.

Open a terminal and navigate to either firmware and call make

4.2 Building the Hardware Design

Copy the file bootrom.mif from either the previous step or from the precompiled files to the Quartus

Project directory corresponding to the module, then start Intel Quartus Prime and open the project. Press

Start Compilation and Quartus will build the FPGA image and generate the programming files in the

subdirectory output_files/

Chapter 4. Programming the Demos

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