Yamaha DSP-A595a Посібник з експлуатації - Сторінка 35

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3 7 63 1515 0
IC4 : YSS918D-F (AC3D2av)
DSP + AC-3 (Digital Dolby)/Pro Logic/DTS Digital Surround Decoder
No.
Name
51
VDD2
52
NONPCM
53
CRC
54
MUTE
55
KARAOKE
56
SURENC
57
/SDBCK0
58
RAMA6
59
RAMA5
60
VSS
61
RAMA4
62
/IC
63
TEST
64
RAMA3
65
/CSB
66
/CS
67
SO
68
SI
69
SCK
70
RAMA2
71
VDD1
72
RAMD0
73
RAMD1
TE
L 13942296513
74
RAMD2
75
RAMD3
76
RAMD4
77
RAMD5
78
RAMD6
79
RAMD7
80
VSS
81
VDD2
82
SDWCK0
83
SDBCK0
84
SDIA0
85
SDIA1
86
RAMA1
87
RAMA0
88
RAMWEN
89
RAMOEN
90
VSS
91
VDD
92
IPORT7
93
IPORT6
94
IPORT5
95
IPORT4
96
IPORT3
97
IPORT2
www
98
IPORT1
99
IPORT0
100
VSS
.
http://www.xiaoyu163.com
I/O
+3V power supply
O
non-PCM data output terminal, non-PCM data detect
O
CRC output terminal (normally unconnected)
O
Mute output terminal, output data mute detect
O
Karaoke output terminal (normally unconnected)
O
Surround encoder output terminal (normally unconnected)
O
Inverted signal of serial data bit clock output terminal 0 (normally unconnected)
O
RAM address output terminal 6, connected to external 1M SRAM address
O
RAM address output terminal 5, connected to external 1M SRAM address
Ground
O
RAM address output terminal 4, connected to external 1M SRAM address
I
Initial clear input terminal
Test terminal (normally unconnected)
O
RAM address output terminal 3, connected to external 1M SRAM address
I
Chip select B input terminal,coefficient and program RAM chip select signal input
I
Chip select input terminal, microprocessor interface chip select signal input
O
Serial data output terminal, microprocessor interface serial data output
I
Serial data input terminal, microprocessor interface and coefficient and program RAM serial data input
I
Serial clock intput terminal, microprocessor interface and coefficient and program RAM serial clock input
O
RAM address output terminal 2, connected to external 1M SRAM address
+5V power supply
I/O
RAM data bus terminal 0, connected to external 1M SRAM data
I/O
RAM data bus terminal 1, connected to external 1M SRAM data
I/O
RAM data bus terminal 2, connected to external 1M SRAM data
I/O
RAM data bus terminal 3, connected to external 1M SRAM data
I/O
RAM data bus terminal 4, connected to external 1M SRAM data
I/O
RAM data bus terminal 5, connected to external 1M SRAM data
I/O
RAM data bus terminal 6, connected to external 1M SRAM data
I/O
RAM data bus terminal 7, connected to external 1M SRAM data
Ground
+3V power supply
I
Serial data word clock input terminal 0
I
Serial data bit clock input terminal 0
I
Serial data input A terminal 0, AC-3/DTS bit stream (or PCM) data input
I
Serial data input A terminal 1 (normally connected to ground)
O
RAM address output terminal 1, connected to external 1M SRAM address
O
RAM address output terminal 0, connected to external 1M SRAM address
O
RAM write enable output terminal, connected to external 1M SRAM write enable
O
RAM output enable output terminal, connected to external 1M SRAM output enable
Ground
+3V power supply
I
Input port terminal 7 (normally connected to ground)
I
Input port terminal 6 (normally connected to ground)
I
Input port terminal 5 (normally connected to ground)
I
Input port terminal 4 (normally connected to ground)
I
Input port terminal 3 (normally connected to ground)
I
Input port terminal 2 (normally connected to ground)
I
Input port terminal 1 (normally connected to ground)
I
Input port terminal 0 (normally connected to ground)
x
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y
Ground
i
http://www.xiaoyu163.com
2 9
8
Function
Q Q
3
6 7
1 3
1 5
co
.
9 4
2 8
0 5
8
2 9
9 4
2 8
m
DSP-A595a
9 9
9 9
28