Cypress Semiconductor CY7C1339G Технічна специфікація - Сторінка 18
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Document History Page
Document Title: CY7C1339G 4-Mbit (128K x 32) Pipelined Sync SRAM
Document Number: 38-05520
REV.
ECN NO. Issue Date
**
224368
See ECN
*A
288909
See ECN
*B
332895
See ECN
*C
351194
See ECN
*D
366728
See ECN
*E
420883
See ECN
*F
480368
See ECN
Document #: 38-05520 Rev. *F
Orig. of
Change
RKF
New data sheet
VBL
In Ordering Info section, Changed TQFP to PB-free TQFP
Added PB-free BG package
SYT
Modified Address Expansion balls in the pinouts for 100 TQFP and 119 BGA
Package as per JEDEC standards and updated the Pin Definitions accordingly
Modified V
V
OL,
OH
Replaced TBDs for Θ
tance table
Updated the Ordering Information by shading and unshading MPNs as per
availability
PCI
Updated Ordering Information Table
PCI
Added V
/V
test conditions in DC Table
DD
DDQ
Modified test condition in note# 10 from V
RXU
Converted from Preliminary to Final
Changed address of Cypress Semiconductor Corporation on Page# 1 from "3901
North First Street" to "198 Champion Court"
Modified "Input Load" to "Input Leakage Current except ZZ and MODE" in the
Electrical Characteristics Table
Replaced Package Name column with Package Diagram in the Ordering Infor-
mation table
Replaced Package Diagram of 51-85050 from *A to *B
Added Automotive Range in Operating Range Table
Updated the Ordering Information
VKN
Added the Maximum Rating for Supply Voltage on V
Updated the Ordering Information table.
Description of Change
test conditions
and Θ
to their respective values on the Thermal Resis-
JA
JC
< V
IH
DD
CY7C1339G
to V
<
V
IH
DD
Relative to GND.
DDQ
Page 18 of 18
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