Cypress Semiconductor Perform STK14D88 Посібник - Сторінка 10

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Mode Selection

E
W
H
X
L
H
L
L
L
H
L
H
L
H
L
H
Notes
18. The six consecutive addresses must be in the order listed. W must be high during all six consecutive cycles to enable a nonvolatile cycle.
19. While there are 15 addresses on the STK14D88, only the lower 14 are used to control software modes
20. I/O state depends on the state of G. The I/O table shown assumes G low.
Document Number: 001-52037 Rev. **
G
A
–A
14
0
X
X
Not Selected
L
X
Read SRAM
X
X
L
0x0E38
Read SRAM
0x31C7
Read SRAM
0x03E0
Read SRAM
0x3C1F
Read SRAM
0x303F
Read SRAM
0x03F8
AutoStore Disable
L
0x0E38
Read SRAM
0x31C7
Read SRAM
0x03E0
Read SRAM
0x3C1F
Read SRAM
0x303F
Read SRAM
0x07F0
AutoStore Enable
L
0x0E38
Read SRAM
0x31C7
Read SRAM
0x03E0
Read SRAM
0x3C1F
Read SRAM
0x303F
Read SRAM
0x0FC0
Nonvolatile Store
L
0x0E38
Read SRAM
0x31C7
Read SRAM
0x03E0
Read SRAM
0x3C1F
Read SRAM
0x303F
Read SRAM
0x0C63
Nonvolatile Recall
Mode
IO
Output High Z
Output Data
Write SRAM
Input Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
STK14D88
Power
Notes
Standby
Active
Active
Active
18, 19, 20
Active
18, 19, 20
18, 19, 20
Active
I
CC2
Active
18, 19, 20
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