DG TOE10G-IP Setup-Handbuch - Seite 7
Blättern Sie online oder laden Sie pdf Setup-Handbuch für Hauptplatine DG TOE10G-IP herunter. DG TOE10G-IP 18 Seiten. Fpga setup with cpu demo
Seite druckendg_toeudp10gip_fpgasetup_intel.doc
The step to setup test environment by using FPGA and PC is described in more details as
follows.
1) Turn off power switch and connect power supply to FPGA board.
2) Connect micro USB cable from FPGA board to PC for JTAG programming and JTAG
UART.
3) Connect 10Gb Ethernet cable between FPGA board and PC.
a) For every board except Stratix10 GX board, insert 10 Gb SFP+ DAC (Length<1m),
AOC or SFP+ transceiver with LC-LC cable) between FPGA board and PC.
b) For Stratix10 GX board, insert QSFP+ to 4 SFP+ cable between FPGA board and PC.
Use SFP+ no.1 to connect to QSFP1, connector on the right side, as shown in
26-Aug-20
Figure 1-5 Power connection and microUSB connection
Figure 1-6 10Gb Ethernet connection
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