UHF (465-495MHz) Receiver
2.2
Receiver Back End
The receiver back end is a dual conversion design. High IF selectivity is provided by FL51, a 4-pole
fundamental mode 44.85 MHz crystal filter with a minimum 3 dB bandwidth of ±6.7 kHz, a maximum
20 dB bandwidth of + 12.5 kHz, and a maximum insertion loss of 3.5 dB. The output is matched to IF
amplifier stage Q51 by L53 and C93. Q51 provides 16 dB of gain and a noise figure of 1.8 dB. The
dc operating current is 1 mA. The output of Q51 is applied to the input of the receiver IFIC U51.
Diode CR51 limits the maximum RF level applied to the IFIC.
The IFIC is a low-voltage monolithic FM IF system incorporating a mixer/oscillator, two limiting IF
amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI), voltage
regulator and audio and RSSI op amps. The second LO frequency, 44.395 MHz, is determined by
Y51. The second mixer converts the 44.85 MHz high IF frequency to 455 kHz.
Additional IF selectivity is provided by two ceramic filters, FL52 (between the second mixer and IF
amp) and FL53 or FL54 (between the IF amp and the limiter input). The wider filter FL53 is used for
20/25 kHz channel spacing, and the narrower filter FL54 is used for 12.5 kHz channels. When the
BW_SEL line is high, the two upper diodes in packages D51 and D52 are forward biased, selecting
FL53 for 20/25 kHz channels. When the BW_SEL line is low, the two lower diodes in packages D51
and D52 are forward biased, selecting FL54 for 12.5 kHz channels.
The ceramic filters have the following specifications:
Ceramic resonator Y70 provides phase vs. frequency characteristic required by the quadrature
detector, with 90 degree phase shift occurring at 455 kHz. Buffer Q70 provides a lower driving
impedance from the limiter to the resonator, improving the IF waveform and lowering the distortion
of the recovered audio signal. The recovered audio level at the DEMOD output is 100 mV rms (25
kHz channel, 3 kHz deviation) or 50 mV rms (12.5 kHz channel, 1.5 kHz deviation). An additional
RSSI output provides a DC voltage level that is proportional to RF signal level. This voltage is
measured by an A/D converter contained in the microprocessor (PE4_AN4, U401 pin 63).
Number of Elements:
Insertion Loss:
6 dB Bandwidth:
50 dB Bandwidth:
Stopband Rejection:
FL52
FL53
4
6
4 dB
4 dB
15 kHz
15 kHz
30 kHz
30 kHz
27 dB
47 dB
FL54
6
4 dB
9 kHz
22 kHz
47 dB
2-3
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