Motorola Professional GP640 Informationen zum Dienst - Seite 11

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Motorola Professional GP640 Informationen zum Dienst

UHF2 Receiver

3.0
UHF2 Receiver
The UHF2 receiver consists of a front end, back end, and automatic gain control circuits. A block
diagram of the receiver is shown in Figure 2-2. Detailed descriptions of these features are contained
in the paragraphs that follow.
Antenna
Pin Diode
Antenna
Switch
RF Jack
3.1

Receiver Front-End

( Refer to Figure 2-2 and the UHF2 Receiver Front End schematic diagram)
The RF signal received by the antenna is applied to a low-pass Þlter. For UHF, the Þlter consists of
components L101, L102, C102, C103, and C104. The Þltered RF signal is passed through the
antenna switch circuit consisting of two pin diodes (CR101 and CR102) and a pi network (C106,
L104, and C107). The signal is then applied to a varactor tuned bandpass Þlter.
The UHF bandpass Þlter consists of components L301, L302, C302, C303, C304, CR301, and
CR302. The Þlter is electronically tuned by DACRx from IC 404 which supplies a control voltage to
the varactor diodes (CR301 and CR302) in the Þlter as determined by the microprocessor
depending on the carrier frequency. Wideband operation of the Þlter is achieved by shifting the
bandpass Þlter across the band.
Varactor
RF Amp
Tuned Filter
First LO
from FGU
Control Voltage
from ASFIC
Recovered Audio
Squelch
RSSI
16.8 MHz
Reference Clock
Figure 2-2 UHF2 Receiver Block Diagram.
Varactor
Tuned Filter
AGC
Demodulator
IC
IF
SPI Bus
Crystal
Mixer
Filter
Synthesizer
Second
LO VCO
2-3