Yamaha DSP-A595a Service-Handbuch - Seite 36

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DSP-A595a
QQ
3 7 63 1515 0
IC5 : M5M51288BKJ-20LTEL (1M SRAM)
131072-word x 8 bit High Speed Static RAM
1
NC
A3
2
3
A4
A5
4
5
A6
A7
6
A8
7
TOP VIEW
A9
8
A10
9
10
A11
A12
11
12
A13
D1
13
14
D2
D3
15
16
GND
TE
L 13942296513
IC7 : AK4320 (DA)
1 bit D/A Converter
CKS
1
2
DVDD
DG
3
4
XTO
XTI
5
/PD
6
TOP VIEW
BICK
7
SDAT
8
9
LRCK
www
SMUT
10
11
HOLD
DEM0
12
.
29
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A0
27
32
VCC
A1
28
31
A2
A2
31
A3
2
30
CE2
A4
3
29
/WE
A5
4
28
A6
A1
5
A7
6
27
A0
A8
7
26
A16
25
A15
A9
8
24
/OE
A10
9
23
A14
A11
10
A12
11
22
/CE1
A13
12
21
D8
A14
23
A15
25
20
D7
A16
26
19
D6
18
D5
17
D4
/CE1
22
CE2
30
/WE
29
/OE
24
/CE1
X
H
L
L
L
NOTE) H: High Level
24
ZMUT
23
DZF
LRCK
9
BICK
7
22
VREF
SDAT
8
21
AG
20
AVDD
VCOM
19
/PD
6
18
OUTL
SMUT
10
17
OUTR
HOLD
11
16
VCNT
24
ZMUT
15
DIF1
DZF
23
x
ao
u163
14
DIF0
y
13
DEM1
i
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2 9
8
18
512
131072-word x 8 bit
MEMORY ARRAY
(512-row X 2048-column)
2048
COLUMN I/O
256
COLUMN ADDRESS
DECODER
16
COLUMN INPUT
BUFFER
CHIP SELECT
WRITE CONTROL
OUTPUT CONTROL
Q Q
3
6 7
1 3
1 5
CE2
/WE
/OW
Mode
Non-selectable
High impedance
L
X
X
Non-selectable
High impedance
X
X
X
Write mode
Input
H
L
X
Read mode
Output
H
H
L
High impedance
H
H
H
L: Low level
X: Don't care
DIF0
DIF1
DEM0
DEM1
AVDD
14
15
12
13
SERIAL INPUT
DE-EMPHASIS
INTERFACE
CONTROL
∆∑
8x
SCF
INTERPOLATOR
MODULATOR
∆∑
8x
SCF
INTERPOLATOR
MODULATOR
CLOCK
OSC/DIVIDER
co
5
4
1
2
3
.
XTI
XTO
CKS
DVDD
DG
VREF
9 4
2 8
VCC
32
GND
16
13
D1
D2
14
15
D3
17
D4
18
D5
19
D6
20
D7
D8
21
0 5
8
2 9
9 4
2 8
Data I/O
Power
On
Standby
On
On
On
AG
20
21
19
VCOM
CTF
18
OUTL
CTF
17
OUTR
m
16
VCNT
22
9 9
9 9