4DSP AD484 Manual del usuario - Página 12

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AD484 user manual
Figure 5: CPLD LED locations

3.2.3 JTAG

A JTAG connector is available on the AD484 for configuration purposes. The JTAG can also
be used to debug the FPGA design with the Xilinx Chipscope.
The JTAG connector is located on side 1 of the PCB in front (see Figure 6).
Figure 6: JTAG connector (J6) location
The JTAG connector pinout is as follows:
February 2007
Pin #
Signal
Signal
1
1.8V
TMS
2
GND
TDI
3
TCK
TDO
Table 5 : JTAG pin assignment
AD484 User manual
www.4dsp.com
Pin #
4
5
6
V1.2
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