Cypress CY3274 Notas de aplicación
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Cypress Powerline Communication Board Design Analysis
To get the latest version of this application note, or the associated project file, please
visit http://www.cypress.com/go/AN55427.
This application note describes the on-board circuitry of Cypress's high voltage 110 V to 240 V AC Powerline
Communication (PLC) boards (CY3274). It describes the filter, coupling circuit, and power supply design. It also explains
the selection of critical components necessary to meet performance and compliance requirements.
Contents
1 Introduction .................................................................. 1
2 High Voltage Board Design ......................................... 2
2.1 Transmit Signal Path ........................................... 5
2.2 Receive Signal Path ............................................ 6
2.3 Signal Path Component Requirements ............... 6
2.4 Power Supply ...................................................... 7
2.5 Power Path Component Requirements ............... 9
2.6 PLC Device Interface ........................................ 10
3 Low Voltage Board Design ........................................ 12
1
Introduction
Powerlines are widely available communication media for PLC technology all over the world. The pervasiveness of
powerline also makes it difficult to predict the characteristics and operation of PLC products. Because of the variable
quality of powerlines around the world, implementing robust communication over powerline has been an engineering
challenge for years. The Cypress PLC solution enables secure and reliable communication over powerline. The
features of Cypress PLC include:
Integrated Powerline PHY modem with optimized filters and amplifiers to work with lossy high voltage and low
voltage powerlines.
Powerline optimized network protocol that supports bidirectional communication with acknowledgement based
signaling. In case of data packet loss due to louder noise on the powerline, the transmitter has the capability to
retransmit the data.
The powerline network protocol supports 8-bit CRC for error detection and data packet retransmission.
A Carrier Sense Multiple Access (CSMA) scheme is built into the network protocol; it minimizes collision between
packet transmissions on the powerline, supports multiple masters, and enables reliable communication on a
bigger network.
A block diagram of the PLC solution with the CY8CPLC20 programmable PLC chip is shown in
the device to the powerline, a coupling circuit is required.
www.cypress.com
Associated Part Family: CY8CPLC10,
3.1 Transmit Signal Path......................................... 13
3.2 Receive Signal Path.......................................... 13
3.3 Signal Path Component Requirements ............. 14
3.4 Power Supply .................................................... 14
3.5 PLC Device Interface ........................................ 15
4 Summary ................................................................... 17
Document History ............................................................ 18
Worldwide Sales and Design Support ............................. 19
Document No. 001-55427 Rev. *E
AN55427
CY8CPLC20
Figure
1. To interface
1