Cypress CY3274 Notas de aplicación - Página 6

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2.2

Receive Signal Path

The receive signal is coupled from the line into the kit via the same isolation transformer, T1, as is used by the
transmitter.
2 . 2 . 1
R e c e i ve F i l t e r
Capacitor C10 provides DC isolation. Resistor R10 provides a signal input impedance for the receiver. This resistor,
in combination with D6, provides signal limiting to protect the receiver circuitry from high amplitude transmitter signals
and any large signals coupled in from the line. The receive filter comprised of L5 and C41, in combination with R10,
provides some rejection of out-of-band interference, such as AM broadcast signals. This interference may be coupled
from the line and would otherwise swamp the PLC device's internal receiver circuitry. The response of the receive
filter is shown in
Figure
device.
2.3

Signal Path Component Requirements

The values of the transmit filter passive components are relatively critical; 1% tolerance parts should be used to
ensure an accurate response. The opamps used in the transmit filter implementation must meet the following
requirements:
Gain Bandwidth (GBW) > 50 MHz
Voltage feedback
≥ 12 V
V
- V
DD
SS
Power Supply Rejection Ration (PSRR) > 70 dB
Total Harmonic Distortion (THD) < -60 dB
The coupling transformer T1 must provide a low DC resistance (<0.5 ), low leakage inductance (<12 H) to
minimize signal loss and isolation, consistent with safety requirements per EN60950 specification. The signal
coupling transformer, T1, used in the CY3272 provides 3750 V isolation, a DC resistance of <0.35  and a leakage
inductance less than 1 H.
Capacitor C9 must be X1 or X2 rated to accommodate the turn-on surge, which occurs when power is applied to the
device, as well as surge immunity according to EN 61000-4-5 and EN 50065-2-1 standards. The capacitor C9, used
in the high voltage board design is a 300 V AC Panasonic ECQUG series metalized polyethylene film device, which is
rated for direct across-line application, accommodating the surge requirements of the previously mentioned
specifications.
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4. Resistors R9 and R11 set the VCC/2 bias voltage required on the receive pin of the PLC
Figure 4. Cypress High Voltage PLC Board Receive Filter Response
Document No. 001-55427 Rev. *E
Cypress Powerline Communication Board Design Analysis
6