Cypress Semiconductor STK14C88-3 Hoja de especificaciones - Página 11
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Imprimir páginaAutoStore or Power Up RECALL
Parameter
Alt
[15]
t
t
HRECALL
RESTORE
[16, 17]
t
t
STORE
HLHZ
[16]
t
VSBL
V
RESET
V
SWITCH
[16]
t
t
DELAY
BLQZ
Switching Waveforms
WE
Notes
15. t
starts from the time V
HRECALL
CC
16. CE and OE low and WE high for output behavior.
17. HSB is asserted low for 1us when V
store will take place.
Document Number: 001-50592 Rev. **
Description
Power up RECALL Duration
STORE Cycle Duration
Low Voltage Trigger (V
Low Voltage Reset Level
Low Voltage Trigger Level
Time Allowed to Complete SRAM Cycle
Figure 11. AutoStore/Power Up RECALL
rises above V
.
SWITCH
drops through V
. If an SRAM WRITE has not taken place since the last nonvolatile cycle, HSB will be released and no
CAP
SWITCH
Min
) to HSB low
SWITCH
2.7
1
STK14C88-3
STK14C88-3
Unit
Max
550
10
ms
300
2.4
2.95
Page 11 of 17
μs
ns
V
V
μs
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