Cypress Semiconductor CY7C1231H Fiche technique - Page 7

Parcourez en ligne ou téléchargez le pdf Fiche technique pour {nom_de_la_catégorie} Cypress Semiconductor CY7C1231H. Cypress Semiconductor CY7C1231H 13 pages. Cypress 2-mbit (128k x 18) flow-through sram with nobl architecture specification sheet

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[11]
Capacitance
Parameter
C
Input Capacitance
IN
C
Clock Input Capacitance
CLOCK
C
I/O Capacitance
I/O
[11]
Thermal Resistance
Parameters
Θ
Thermal Resistance
JA
(Junction to Ambient)
Θ
Thermal Resistance
JC
(Junction to Case)
AC Test Loads and Waveforms
3.3V I/O Test Load
OUTPUT
Z
= 50Ω
0
V
= 1.5V
L
(a)
2.5V I/O Test Load
OUTPUT
Z
= 50Ω
0
V
= 1.25V
T
(a)
Note:
11. Tested initially and after any design or process change that may affect these parameters.
Document #: 001-00207 Rev. *B
Description
Description
Test conditions follow standard test methods and
procedures for measuring thermal impedance,
per EIA/JESD51
3.3V
OUTPUT
= 50Ω
R
L
5 pF
INCLUDING
JIG AND
SCOPE
(b)
2.5V
OUTPUT
R
= 50Ω
L
5 pF
INCLUDING
JIG AND
SCOPE
(b)
Test Conditions
T
= 25°C, f = 1 MHz,
A
V
= 3.3V
DD
V
= 2.5V
DDQ
Test Conditions
R = 317Ω
V
DDQ
10%
GND
R = 351Ω
≤ 1 ns
R = 1667Ω
V
DDQ
10%
GND
R =1538Ω
≤ 1 ns
CY7C1231H
100 TQFP
Max.
Unit
5
pF
5
pF
5
pF
100 TQFP
Package
Unit
30.32
°C/W
6.85
°C/W
ALL INPUT PULSES
90%
90%
10%
≤ 1 ns
(c)
ALL INPUT PULSES
90%
90%
10%
≤ 1 ns
(c)
Page 7 of 12
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