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Intel® Server Platform SR870BH2
The BIOS and BMC maintain failure history for each processor in nonvolatile storage. This
history is used to store a processor's track record. Once a processor is marked "failed," it
remains "failed" until the user forces the system to retest the processor by entering BIOS Setup
and selecting the "Retest processors" option. The BIOS reminds the user about a previous
processor failure during each boot cycle until all processors have been retested and
successfully passed the FRB tests or AP initialization.
It is possible for all the processors in the system to be marked bad. If all the processors are bad,
the system, in final desperation mode, does not alter the BSP and attempts to boot from the
original BSP. Again, error messages are displayed on the console and errors are logged in the
SEL against a failing or non-healthy processor, with the exception of the single processor case,
where the error will be logged, but failing desperation mode, there will be no video display.
If the user replaces a processor that has been marked bad by the system, the system must be
informed about this change by running BIOS Setup and selecting the processor retest option.
User selection of the Retest Processor option, in BIOS Setup, results in the BIOS and BMC
clearing the Processor failure history from their respective non-volatile storage.
There are three possible states for each processor slot:
•
Processor installed (status only; indicates processor has passed BIOS POST).
•
Processor failed. The processor may have failed FRB-2, FRB-3, or BIST, and it has
been disabled.
•
Processor not installed (status only, indicates the processor slot has no processor in it).
8.5.5
FRB Failure Isolation
The issue may be caused by add-in adapter resource contention causing the timer to expire and
trigger an FRB, the system should be brought to a minimum config to eliminate variables and
restarted w/processor re-test (Enter BIOS / startup options). If the failure persists Refer to
"Processor" in Debug Methodology and failure Isolation section.
Revision 1.1
Debug Methodology and Failure Isolation
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