Cypress Semiconductor MoBL-USB CY7C68000A Lembar Spesifikasi - Halaman 13

Jelajahi secara online atau unduh pdf Lembar Spesifikasi untuk Perangkat Keras Komputer Cypress Semiconductor MoBL-USB CY7C68000A. Cypress Semiconductor MoBL-USB CY7C68000A 16 halaman. Tx2 usb 2.0 utmi transceiver

Package Diagrams
Figure 7. 56 VFBGA (5 x 5 x 1.0 mm) 0.50 Pitch, 0.30 Ball BZ56
TOP VIEW
PIN A1 CORNER
1
2
3
A
B
C
D
E
F
G
H
5.00±0.10
SIDE VIEW
-C-
SEATING PLANE

PCB Layout Recommendations

Follow these recommendations to ensure reliable, high-perfor-
[3]
mance operation
.
A four-layer impedance controlled board is required to maintain
signal quality
Specify impedance targets (ask your board vendor what they
can achieve)
To control impedance, maintain trace widths and trace spacing
to within written specifications
Minimize stubs to minimize reflected signals
Note
3. Source for recommendations: EZ-USB FX2™ PCB Design Recommendations, http:///www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf
High-Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
Document #: 38-08052 Rev. *G
(continued)
4
5
6
6
8
BOTTOM VIEW
8
7
-B-
-A-
0.10(4X)
REFERENCE JEDEC: MO-195C
PACKAGE WEIGHT: 0.02 grams
Connections between the USB connector shell and signal
ground must be done near the USB connector
Bypass and flyback capacitors on VBus, near the connector,
are recommended
Keep DPLUS and DMINUS trace lengths within 2 mm of each
other in length, with preferred length of 20 to 30 mm
Maintain a solid ground plane under the DPLUS and DMINUS
traces. Do not split the plane under these traces
Do not place vias on the DPLUS or DMINUS trace routing
Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm
CY7C68000A
Ø0.05 M C
Ø0.15 M C A B
A1 CORNER
Ø0.30±0.05(56X)
6
5
4
3
2
1
A
B
C
D
E
F
G
H
0.50
3.50
5.00±0.10
001-03901-*B
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