Motorola LB3 (42.0 - 50.0MHz) Informazioni sul servizio - Pagina 11
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Low Band Transmitter Power Amplifier (PA) 25-60 W
3.0
Low Band Transmitter Power Amplifier (PA) 25-60 W
The radio's 60 W PA is a three-stage amplifier used to amplify the output from the VCO to the radio
transmit level. The line-up consists of three stages which utilize LDMOS technology. The first stage
is pre-driver (U1401) that is controlled by pin 4 of PCIC (U1503) via Q1504 and Q1505
(CNTLVLTG). It is followed by driver stage Q1401, and final stage utilizing two devices (Q1402 and
Q1403) connected in parallel. Q1402 and Q1403 are in direct contact with the heat sink.
To prevent damage to the final stage devices, a safety switch has been installed to prevent the
transmitter from being keyed with the cover removed.
TXINJ
From VCO
Controlled
DC AMP
3.1
Power Controlled Stage
The first stage (U1401) is a 20dB gain integrated circuit containing two LDMOS FET amplifier
stages. It amplifies the RF signal from the VCO (TXINJ). The output power of stage U1401 is
controlled by a DC voltage applied to pin 1 from the power control circuit (U1503 pin 4, with
transistors Q1504-5 providing current gain and level-shifting). The control voltage simultaneously
varies the bias of two FET stages within U1401. This biasing point determines the overall gain of
U1401 and therefore its output drive level to Q1401, which in turn controls the output power of the
PA.
3.2
Driver Stage
The next stage is an LDMOS device (Q1401) providing a gain of 13dB. This device requires a
positive gate bias and a quiescent current flow for proper operation. The voltage of the line
MOSBIAS_1 is set during transmit mode by the PCIC pin 24, and fed to the gate of Q1401 via
resistors R1402, R1447, R1449, R1458, R1459 and R1463, The bias voltage is tuned in the factory.
The circuitry associated with U1402-2 and Q1404 limits the variation in the output power of the
driver stage resulting from changes in the input impedance of the final stage due to changes at the
Power
PA
Driver
Stage
BIAS
Current
Sense
24
4
PCIC
INT
SPI Bus
Figure 2-2 LowBand Transmitter Block Diagram
Pin Diode
Antenna
Switch
PA-Final
Stage
Current
Sense
PASUPLVLTG
29
Temperature
Sense
To Microprocessor
Antenna
Harmonic
Filter
RF Jack
BIAS
(2 Lines)
5
6
ASFIC_CMP
2-5