Cypress CY62157EV18 Scheda tecnica - Pagina 5

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Switching Characteristics
Parameter
Read Cycle
t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE
LOW and CE
ACE
1
t
OE LOW to Data Valid
DOE
t
OE LOW to Low-Z
LZOE
t
OE HIGH to High-Z
HZOE
t
CE
LOW and CE
LZCE
1
t
CE
HIGH and CE
HZCE
1
t
CE
LOW and CE
PU
1
t
CE
HIGH and CE
PD
1
t
BLE/BHE LOW to Data Valid
DBE
[15]
t
BLE/BHE LOW to Low-Z
LZBE
t
BLE/BHE HIGH to High-Z
HZBE
[16]
Write Cycle
t
Write Cycle Time
WC
t
CE
LOW and CE
SCE
1
t
Address Setup to Write End
AW
t
Address Hold from Write End
HA
t
Address Setup to Write Start
SA
t
WE Pulse Width
PWE
t
BLE/BHE LOW to Write End
BW
t
Data Setup to Write End
SD
t
Data Hold from Write End
HD
t
WE LOW to High-Z
HZWE
t
WE HIGH to Low-Z
LZWE
Notes
11. Test conditions for all parameters other than tri-state parameters assume signal transition time of 1V/ns or less, timing reference levels of V
levels of 0 to V
, and output loading of the specified I
CC(typ)
12. AC timing parameters are subject to byte enable signals (BHE or BLE) not switching when chip is disabled. Please see application note AN13842 for further
clarification.
13. At any given temperature and voltage condition, t
given device.
14. t
, t
, t
, and t
transitions are measured when the output enters a high impedance state.
HZOE
HZCE
HZBE
HZWE
15. If both byte enables are toggled together, this value is 10 ns.
16. The internal write time of the memory is defined by the overlap of WE, CE = V
write and any of these signals can terminate a write by going INACTIVE. The data input setup and hold timing must be referenced to the edge of the signal that
terminates the write.
Document #: 38-05490 Rev. *D
[11, 12 ]
(Over the Operating Range)
Description
HIGH to Data Valid
2
[13]
[13, 14]
[13]
HIGH to Low-Z
2
[13, 14]
LOW to High-Z
2
HIGH to Power Up
2
LOW to Power Down
2
[13]
[13, 14]
HIGH to Write End
2
[13, 14]
[13]
/I
as shown in the
OL
OH
is less than t
, t
HZCE
LZCE
HZBE
IL
CY62157EV18 MoBL
Min
55
10
5
10
0
10
45
35
35
0
0
35
35
25
0
10
"AC Test Loads and Waveforms" on page
is less than t
, t
is less than t
LZBE
HZOE
LZOE
, BHE and/or BLE = V
, and CE
= V
IL
2
IH
55 ns
Unit
Max
ns
55
ns
ns
55
ns
25
ns
ns
18
ns
ns
18
ns
ns
55
ns
55
ns
ns
18
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
18
ns
/2, input pulse
CC(typ)
4.
, and t
is less than t
for any
HZWE
LZWE
. All signals must be ACTIVE to initiate a
Page 5 of 12
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