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コンピュータ・ハードウェア Cypress Semiconductor CY7B992のPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY7B992 20 ページ。 Cypress programmable skew clock buffer specification sheet
ページを印刷するElectrical Characteristics
[6]
Over the Operating Range
Parameter
Description
V
Output HIGH Voltage
OH
V
Output LOW Voltage
OL
V
Input HIGH Voltage
IH
(REF and FB inputs only)
V
Input LOW Voltage
IL
(REF and FB inputs only)
V
Three Level Input HIGH
IHH
Voltage (Test, FS, xFn)
V
Three Level Input MID
IMM
Voltage (Test, FS, xFn)
V
Three Level Input LOW
ILL
Voltage (Test, FS, xFn)
I
Input HIGH Leakage Current
IH
(REF and FB inputs only)
I
Input LOW Leakage Current
IL
(REF and FB inputs only)
I
Input HIGH Current
IHH
(Test, FS, xFn)
I
Input MID Current
IMM
(Test, FS, xFn)
I
Input LOW Current
ILL
(Test, FS, xFn)
I
Output Short Circuit
OS
[8]
Current
I
Operating Current Used by
CCQ
Internal Circuitry
I
Output Buffer Current per
CCN
[9]
Output Pair
PD
Power Dissipation per
[10]
Output Pair
Notes
6. For more information see
"Group A Subgroup Testing"
7. These inputs are normally wired to V
unconnected inputs at V
/2. If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional t
CC
all datasheet limits are achieved.
8. CY7B991 must be tested one output at a time, output shorted for less than one second, less than 10% duty cycle. Room temperature only. CY7B992 outputs must
not be shorted to GND. Doing so may cause permanent damage.
9. Total output current per output pairis approximated by the following expression that includes device current plus load current:
CY7B991:
I
= [(4 + 0.11F) + [((835 – 3F)/Z) + (.0022FC)]N] x 1.1
CCN
CY7B992:
I
= [(3.5+ 0.17F) + [((1160 – 2.8F)/Z) + (.0025FC)]N] x 1.1
CCN
Where
F = frequency in MHz; C = capacitive load in pF; Z = line impedance in ohms; N = number of loaded outputs; 0, 1, or 2; FC = F < C.
10. Total power dissipation per output pair can be approximated by the following expression that includes device power dissipation plus power dissipation due to the load
circuit:
CY7B991:PD = [(22 + 0.61F) + [((1550 – 2.7F)/Z) + (.0125FC)]N] x 1.1
CY7B992:PD = [(19.25+ 0.94F) + [((700 + 6F)/Z) + (.017FC)]N] x 1.1
See note 9 for variable definition.
11. Applies to REF and FB inputs only. Tested initially and after any design or process changes that may affect these parameters.
Document Number: 38-07138 Rev. *B
Test Conditions
V
= Min I
= –16 mA
CC
OH
V
= Min, I
=–40 mA
CC
OH
V
= Min, I
= 46 mA
CC
OL
V
= Min, I
= 46 mA
CC
OL
Min ≤ V
≤ Max
CC
[10]
Min ≤ V
≤ Max
CC
[10]
Min ≤ V
≤
CC
[10]
Maximum
V
= Max, V
= Max.
CC
IN
V
= Max, V
= 0.4V
CC
IN
V
= V
IN
CC
V
= V
/2
IN
CC
V
= GND
IN
V
= Max, V
CC
OUT
°
= GND (25
C only)
V
= V
= Max,
CCN
CCQ
All Input
Selects Open
V
= V
= Max,
CCN
CCQ
I
= 0 mA
OUT
Input Selects Open, f
V
= V
= Max,
CCN
CCQ
I
= 0 mA
OUT
Input Selects Open, f
on page
17.
, GND, or left unconnected (actual threshold voltages vary as a percentage of V
CC
CY7B991
Min
Max
2.4
0.45
2.0
V
CC
–0.5
0.8
V
– 0.85
V
CC
CC
V
/2 –
V
/2 +
CC
CC
500 mV
500 mV
0.0
0.85
10
–500
200
–50
50
–200
–250
Com'l
85
Mil/Ind
90
14
MAX
78
MAX
CY7B991
CY7B992
CY7B992
Min
Max
Unit
V
V
–0.75
CC
V
0.45
V
–
V
V
CC
CC
1.35
–0.5
1.35
V
V
– 0.85
V
V
CC
CC
V
/2 –
V
/2 +
V
CC
CC
500 mV
500 mV
0.0
0.85
V
μA
10
μA
–500
μA
200
μA
–50
50
μA
–200
N/A
mA
85
mA
90
19
mA
[11]
104
mW
). Internal termination resistors hold
CC
time before
LOCK
Page 6 of 19
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