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コンピュータ・ハードウェア Cypress Semiconductor CY7C1399BのPDF 仕様書をオンラインで閲覧またはダウンロードできます。Cypress Semiconductor CY7C1399B 11 ページ。 32k x 8 3.3v static ram
ページを印刷するSwitching Characteristics
Parameter
READ CYCLE
t
Read Cycle Time
RC
t
Address to Data Valid
AA
t
Data Hold from Address Change
OHA
t
CE LOW to Data Valid
ACE
t
OE LOW to Data Valid
DOE
t
OE LOW to Low Z
LZOE
t
OE HIGH to High Z
HZOE
t
CE LOW to Low Z
LZCE
t
CE HIGH to High Z
HZCE
t
CE LOW to Power-Up
PU
t
CE HIGH to Power-Down
PD
[8, 9]
WRITE CYCLE
t
Write Cycle Time
WC
t
CE LOW to Write End
SCE
t
Address Set-Up to Write End
AW
t
Address Hold from Write End
HA
t
Address Set-Up to Write Start
SA
t
WE Pulse Width
PWE
t
Data Set-Up to Write End
SD
t
Data Hold from Write End
HD
t
WE LOW to High Z
HZWE
t
WE HIGH to Low Z
LZWE
Data Retention Characteristics
Parameter
V
V
DR
I
Data Retention Current
CCDR
t
Chip Deselect to Data
CDR
Retention Time
t
Operation Recovery Time
R
Document #: 38-05071 Rev. *A
Over the Operating Range
Description
[6]
[6, 7]
[6]
[6, 7]
[8]
[6]
(Over the Operating Range - L version only)
Description
for Data Retention
CC
Com'l
[5]
(Continued)
1399B–15
Min.
15
3
0
3
0
15
10
10
0
0
10
8
0
3
Conditions
V
= V
= 2.0V,
CC
DR
CE > V
– 0.3V,
CC
V
> V
– 0.3V or
IN
CC
V
< 0.3V
IN
CY7C1399B
1399B–20
Max.
Min.
Max.
20
15
20
3
15
20
6
7
0
6
6
3
7
7
0
15
20
20
12
12
0
0
12
10
0
7
7
3
Min.
Max.
2.0
0
20
0
t
RC
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
V
uA
ns
ns
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