Cypress Semiconductor CY7C1041DV33 사양 시트 - 페이지 7
{카테고리_이름} Cypress Semiconductor CY7C1041DV33에 대한 사양 시트을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress Semiconductor CY7C1041DV33 14 페이지. 4 mbit (256k x 16) static ram
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Switching Waveforms
ADDRESS
CE
OE
BHE, BLE
HIGH IMPEDANCE
DATA OUT
V
CC
SUPPLY
CURRENT
ADDRESS
CE
WE
BHE, BLE
DATAIO
Notes
18. Address valid prior to or coincident with CE transition LOW.
19. Data IO is high impedance if OE or BHE and BLE = V
20. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
Document #: 38-05473 Rev. *E
(continued)
Figure 5. Read Cycle No. 2 (OE Controlled)
t
RC
t
ACE
t
DOE
t
LZOE
t
DBE
t
LZBE
t
LZCE
t
PU
50%
Figure 6. Write Cycle No. 1 (CE Controlled)
t
SA
t
AW
IH.
[17, 18]
DATA VALID
[19, 20]
t
WC
t
SCE
t
PWE
t
BW
t
SD
CY7C1041DV33
t
HZOE
t
HZCE
t
HZBE
HIGH
IMPEDANCE
t
PD
I
ICC
CC
50%
I
ISB
SB
t
HA
t
HD
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