Cypress Semiconductor CY7C1332AV25 사양 시트 - 페이지 10
{카테고리_이름} Cypress Semiconductor CY7C1332AV25에 대한 사양 시트을 온라인으로 검색하거나 PDF를 다운로드하세요. Cypress Semiconductor CY7C1332AV25 19 페이지. Cypress 18-mbit (512k x 36/1mbit x 18) pipelined register-register late write specification sheet
페이지 인쇄TAP AC Switching Characteristics
Parameter
t
Capture Hold after Clock Rise
CH
Output Times
t
TCK Clock LOW to TDO Valid
TDOV
t
TCK Clock LOW to TDO Invalid
TDOX
TAP Timing and Test Conditions
TDO
Z
= 50Ω
0
GND
(a)
Test Clock
TCK
Test Mode Select
TMS
Test Data-In
TDI
Test Data-Out
TDO
Identification Register Definitions
Instruction Field
Revision Number (31:29)
Cypress Device ID (28:12)
Cypress JEDEC ID (11:1)
ID Register Presence (0)
Document No: 001-07844 Rev. *A
PRELIMINARY
Over the Operating Range (continued)
Description
[11]
1.25V
50Ω
= 20 pF
C
L
t
TMSS
t
TDIS
Value
CY7C1330AV25
CY7C1332AV25
000
01011110101100101 01011110101010101 Defines the type of SRAM.
00000110100
00000110100
1
[10, 11]
ALL INPUT PULSES
2.5V
1.25V
0V
t
t
TL
TH
t
TCYC
t
TMSH
t
TDIH
t
TDOV
t
TDOX
000
Version number.
Allows unique identification of SRAM vendor.
1
Indicates the presence of an ID register.
CY7C1330AV25
CY7C1332AV25
Min.
Max.
Unit
5
ns
10
ns
0
ns
Description
Page 10 of 19
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