EG&G ORTEC 552 운영 및 서비스 매뉴얼 - 페이지 11
{카테고리_이름} EG&G ORTEC 552에 대한 운영 및 서비스 매뉴얼을 온라인으로 검색하거나 PDF를 다운로드하세요. EG&G ORTEC 552 16 페이지. Pulse-shape analyzer and timing single-channel analyzer
페이지 인쇄Input
OUTPUT
GENERATOR
UL DISC
Int
Norm/Win'
Int/Norm A
Win
OUTPUT
GENERATOR
IL DISC
ATTN
A SCA
CURRENT
SWITCH
CHANNEL A
GATE
CHANNE
CP DISC
.2 A
Jumper tor
Fraction Select
CURRENT
SWITCH
CHANNEL B
B-SCA
CHANNEL
DELAY
CP DISC
PEAK
STRETCHER
Strobe
B-Praction
Switch
Strobe
OUTPUT
GENERATOR
@ UL Out
LL Out
A Neg Out
B Neg Out
-0(FP)
Fig. 5.1. Simplified Block Diagram of the 552 PSA/T-SCA.
The CF discriminators are both triggered at the onset of
each input pulse, whether its amplitude is sufficient to
trigger either of the other two discriminators or not. Then
each CF discriminator is reset when the input pulse
decays through its attenuated peak-reference level be
cause the stretch and attenuate circuit has generated and
maintained this reference level by that time and has fur
nished it as the reference level of its corresponding
discriminator. The stretched input to the attenuator for
channel A can be used to set the reference level at 10%,
20%, or 50% of the decay from the peak, selected by a
jumper location on the printed circuit board, J2. The same
stretched input is supplied to the channel B attenuator
which can select a reference level of 10%, 20%, 30%, 40%,
50%, 60%, 70%, 80%, 90%, or 100% of the decay from the
peak, selected by a front panel switch.
The logic gate is triggered when the LL discriminator has
been set and when there is no signal from the UL discrim
inator. This enables a gate for the channel A discriminator
and a current switch generates a NIM-standard fast
negative output promptly at the discriminator reset. The
logic gate output also enables a gate for the channel 8
discriminator that can be used to generate channel B out
puts. A rear panel Strobe switch selects either an internal
or an external strobe signal for the delay circuit. If the
external strobe .node is used, the circuits are reset with
out generating a channel B output if no strobe is furnished
within 10 ns.
5.2.
INTEGRATED CIRCUITS
The nomenclature used to identify integrated circuit
packages in this manual is defined below for the example
IC1-7
where
and
10 = integrated circuit,
1 = reference designation,
7 = pin number.
Any portion of an 10 package can be designated by its
output pin number. Thus the example specifies the por
tion of 101 that includes pin 7 as an output.
5.3.
LOWER-LEVEL BIAS
The threshold for the lower-level discriminator is adjusted
with the front panel Lower-Level control, R53, or is
furnished as a dc level through 0N2 on the rear panel.
Switch 82 on the rear panel selects which source is effec
tive for the lower-level bias reference.
For the internal bias circuit, the minimum level of the front
panel control is normalized with potentiometer R54,
mounted on the printed circuit. The actual range of R53
Is from a few millivolts, adjusted by R54, to -5 V. The ad
justed level is buffered through IC1-1 and inverted
without being amplified through IC1-7 to be furnished
as the reference level to the noninverting input of discrim
inator IC3.