HP 124708-001 1850 Introduction Manual - Page 13

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HP 124708-001 1850 Introduction Manual
The 64-bit Xeon 5100 series two-core processor runs at a maximum frequency of 3.0 GHz with 4 MB
of shared L2 cache and a maximum front-side bus speed of 1333 megahertz (Figure 7 right).
The Xeon 5000 Sequence as well as the 5100 and 5200 series processors use the Intel 5000 series
chipsets. These chipsets contain two main components: the Memory Controller Hub (MCH) and the
I/O controller hub. The new Northbridge MCH supports DDR2 Fully-Buffered DIMMs (dual in-line
memory modules).
Figure 7. Diagram representing the major components of two-core Intel Xeon 3000, 5000, 5100, and 5200
Sequence
processors

Xeon four-core processors

The four-core Intel Xeon 5300 series processor (Clovertown) was the first four-core processor for dual-
socket platforms (Figure 8). The Xeon 5300 series processor has two dual-cores. Each pair of cores
shares a L2 cache; up to 4 MB of L2 cache can be allocated to one core. The processor runs at a
maximum frequency of 3.0 GHz, with 2 MB of L2 cache per core. This configuration delivers a
significant increase in processing capacity utilizing the Intel 5000 series chipsets. ProLiant 300 series
servers use the Intel 5000P and 5000Z chipsets. These chipsets support 1066-MHz and 1333-MHz
Two Independent Buses, DDR2 FB-DIMMs, and PCI Express I/O slots.
The four-core Xeon 5400 series processor (Harpertown) has two dual-cores, and each pair shares a
6-MB L2 cache. The Xeon 5400 series processor runs at a maximum frequency of 3.0 MHz with a
1333 MZ or 1600 MHz FSB.
Figure 8. Intel Xeon 5300 and 5400 series processors contain two dual-core chips.
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