HP 226824-001 - ProLiant - ML750 Overview - Page 12

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Double transition clocking

Standard DRAM transfers one data bit to the bus on the rising edge of the bus clock signal, while

DDR-1 uses both the rising and falling edges of the clock to trigger the data transfer to the bus

(Figure 10). This technique, known as double transition clocking, delivers twice the bandwidth of

SDRAM without increasing the clock frequency. DDR-1 has theoretical peak data transfer rates of 1.6

and 2.1 GB/s at clock frequencies of 100 MHz and 133 MHz, respectively.

Figure 10. Data transfer rate comparison between SDRAM (with burst mode access) and DDR SDRAM

SSTL_2 low-voltage signaling technology

Another difference between SDRAM and DDR-1 is the signaling technology. Instead of using a 3.3-V

operating voltage, DDR-1 uses a 2.5-V signaling specification known as Stub Series-Terminated

Logic_2 (SSTL_2). This low-voltage signaling results in lower power consumption and improved heat

dissipation.

Stobe-based data bus

SSTL_2 signaling allows DDR-1 to run at faster speeds than traditional SDRAM. In addition, DDR-1

uses a delay-locked loop (one for every 16 outputs) to provide a data strobe signal as data becomes

valid on the SDRAM pins. The memory controller uses the data strobe signal to locate data more

accurately and resynchronize incoming data from different DIMMs.

DDR-1 operates at transfer rates of 400 Mb/s, or 3.2 GB/s. Although the data bus is capable of

running at these speeds, the command bus cannot. Tight system timing requirements were alleviated

on the data bus by using strobes. However, the command bus does not use a strobe and must still

meet setup times to a synchronous clock. Thus, at a data rate of 400 Mb/s, the command bus must

operate at 200 MHz.