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Dell™ PowerEdge™ M710 Technical Guidebook

Intel I/O Controller Hub (ICH). The DMI is equivalent to a x4 PCIe Gen1 link with a transfer rate of 1 Gb/s

in each direction.

PCI Express Generation 2

PCI Express is a serial point-to-point interconnect for I/O devices. PCIe Gen2 doubles the signaling bit

rate of each lane from 2.5 Gb/s to 5 Gb/s. Each of the PCIe Gen2 ports are backwards-compatible with

Gen1 transfer rates.

In the Tylersburg-36D IOH, there are two x2 PCIe Gen2 ports (1Gb/s) and eight x4 PCIe Gen2 ports (2

Gb/s). The x2 ports can be combined as a x4 link; however, this x4 link cannot be combined with any of

the other x4 ports. Two neighboring x4 ports can be combined as a x8 link, and both resulting x8 links

can combine to form a x16 link.

Intel I/O Controller Hub 9 (ICH9)

ICH9 is a highly integrated I/O controller, supporting the following functions:

• S ix x1 PCIe Gen1 ports, with the capability of combining ports 1-4 as a x4 link

• T hese ports are unused on the PowerEdge M710

• P CI Bus 32-bit Interface Rev 2.3 running at 33MHz

• U p to six Serial ATA (SATA) ports with transfer rates up to 300 MB/s

• T he PowerEdge M710 features two SATA port for optional internal optical drive or

tape backup

• S ix UHCI and two EHCI (High-Speed 2.0) USB host controllers, with up to twelve USB ports

• T he PowerEdge M710 has eight external USB ports and two internal ports dedicated for

UIPS. Refer to the Whoville Hardware/BIOS Specification for the USB assignments for

each platform

• P ower management interface (ACPI 3.0b compliant)

• P latform Environmental Control Interface (PECI)

• I ntel Dynamic Power Mode Manager

• I /O interrupt controller

• S MBus 2.0 controller

• L ow Pin Count (LPC) interface to Super I/O, Trusted Platform Module (TPM), and SuperVU

• S erial Peripheral Interface (SPI) support for up to two devices

• T he PowerEdge M710's BIOS is connected to the ICH using SPI

sectiOn 8. biOs

a. Overview / Description

The PowerEdge M710 BIOS is based on the Dell BIOS core, and supports the following features:

• N ehalem-EP 2S Support

• S imultaneous Multi-Threading (SMT) support

• C PU Turbo Mode support

• P CI 2.3 compliant

• P lug n' Play 1.0a compliant

• M P (Multiprocessor) 1.4 compliant

• B oot from hard drive, external optical drive, iSCSI drive, USB key, and SD card

• A CPI support

• D irect Media Interface (DMI) support

• P XE and WOL support for on-board NICs

• M emory mirroring and spare bank support

• S ETUP access through <F2> key at end of POST

• U SB 2.0 (USB boot code is 1.1 compliant)

• F 1/F2 error logging in CMOS

• V irtual KVM, CD, and floppy support